.include "m32def.inc"					;ein ATMEGA32 steckt im Sockel
.def temp1 		= 	r21					;Register mit dem Daten oder Befehlsbyte
.def temp3   	=   r20					;Hilfsregister von dem subtrahiert wird

.CSEG

		.org 0
		rjmp	RESET


;******************************************************************************
; data tables
;******************************************************************************

	; force table to begin at 256 byte boundary

	.org 0x100

sine:		; 256 step sinewave table

.DB 64,65,67,68,70,72,73,75
.DB 76,78,79,81,82,84,85,87
.DB 88,90,91,92,94,95,97,98
.DB 99,100,102,103,104,105,107,108
.DB 109,110,111,112,113,114,115,116
.DB 117,118,118,119,120,121,121,122
.DB 123,123,124,124,125,125,126,126
.DB 126,127,127,127,127,127,127,127
.DB 128,127,127,127,127,127,127,127
.DB 126,126,126,125,125,124,124,123
.DB 123,122,121,121,120,119,118,118
.DB 117,116,115,114,113,112,111,110
.DB 109,108,107,105,104,103,102,100
.DB 99,98,97,95,94,92,91,90
.DB 88,87,85,84,82,81,79,78
.DB 76,75,73,72,70,68,67,65
.DB 64,62,61,59,58,56,54,53
.DB 51,50,48,47,45,44,42,41
.DB 39,38,36,35,34,32,31,30
.DB 28,27,26,25,23,22,21,20
.DB 19,18,17,15,14,13,13,12
.DB 11,10,9,8,8,7,6,5
.DB 5,4,4,3,3,2,2,2
.DB 1,1,1,0,0,0,0,0
.DB 0,0,0,0,0,0,1,1
.DB 1,2,2,2,3,3,4,4
.DB 5,5,6,7,8,8,9,10
.DB 11,12,13,13,14,15,17,18
.DB 19,20,21,22,23,25,26,27
.DB 28,30,31,32,34,35,36,38
.DB 39,41,42,44,45,47,48,50
.DB 51,53,54,56,58,59,61,62




;
;
;
; Output frequency (using 24 bit accumulator) :
;
;	f = deltaPhase * fClock/2^24
;
;   fClock is in this case the CPU clock divided by the
;	number of cycles to output the data ( 9 cycles )
;
;	f = r24/r25/r26 * (11059200/9)/16777216
;
;	f = r24/r25/r26 * 0.073242188
;
;	fMax (theoretical) = 0.5 * fClock
;



			;*** Initialisierung Stack

reset:		ldi 	temp1,HIGH(RAMEND)
			out 	SPH,temp1

 			ldi 	temp1,LOW(RAMEND)	;Stack ans Speicherende legen
			out 	SPL,temp1



			ldi		temp1,0xFF			;PortC Ausgabe
			out		DDRC,temp1

			ldi		temp1,0xFF			;PortC Ausgabe
			out		DDRA,temp1


			sbi		PORTA,6
			rcall	pause250ms
			rcall	pause250ms
			rcall	pause250ms
			rcall	pause250ms
			cbi		PORTA,6


; set sinewave output as default
		
		ldi		r31,HIGH(sine*2); setup Z pointer hi
		ldi		r30,LOW(sine*2)	; setup Z pointer lo

		; clear accumulator 

		ldi 	r29,0x00		; clear accumulator 
		ldi 	r28,0x00		; clear accumulator 

		; setup adder registers		
		
		ldi 	r24,0x55		; setup adder value
		ldi 	r25,0x35		; to 1 kHz
		ldi 	r26,0x00	



; main loop
;
;	r28,r29,r30 is the phase accumulator
;  	r24,r25,r26 is the adder value determining frequency
;
; 	add value to accumulator
;	load byte from current table in ROM
;	output byte to port
;	repeat 
;
LOOPX:
		add		r28,r24			; 1
		adc		r29,r25			; 1
		adc		r30,r26			; 1
		lpm						; 3
		out		PORTC,r0		; 1


		;cbi		PORTC,7			; 2
		rjmp	LOOPX			; 2 => 11 cycles









;*********************
;*** 250ms - Pause ***
;*********************
pause250ms:
            push     r16
            push     r17
            push     r18
            ldi      r18, 107

pause250000us0:
            ldi      r17, 178

pause250000us1:
            ldi      r16, 69

pause250000us2:
            subi     r16, 1
            brne     pause250000us2
            subi     r17, 1
            brne     pause250000us1
            subi     r18, 1
            brne     pause250000us0
            pop      r18
            pop      r17
            pop      r16
            ret