Xilinx System Settings Report

System Settings

Environment Settings
Environment Variable	xst	ngdbuild	map	par
PATHEXT	.COM; .EXE; .BAT; .CMD; .VBS; .VBE; .JS; .JSE; .WSF; .WSH; .MSC	.COM; .EXE; .BAT; .CMD; .VBS; .VBE; .JS; .JSE; .WSF; .WSH; .MSC	.COM; .EXE; .BAT; .CMD; .VBS; .VBE; .JS; .JSE; .WSF; .WSH; .MSC	.COM; .EXE; .BAT; .CMD; .VBS; .VBE; .JS; .JSE; .WSF; .WSH; .MSC
Path	C:\Xilinx\13.3\ISE_DS\ISE\\lib\nt; C:\Xilinx\13.3\ISE_DS\ISE\\bin\nt; C:\Xilinx\13.3\ISE_DS\PlanAhead\bin; C:\Xilinx\13.3\ISE_DS\ISE\bin\nt; C:\Xilinx\13.3\ISE_DS\ISE\lib\nt; C:\Xilinx\13.3\ISE_DS\EDK\bin\nt; C:\Xilinx\13.3\ISE_DS\EDK\lib\nt; C:\Xilinx\13.3\ISE_DS\EDK\gnu\microblaze\nt\bin; C:\Xilinx\13.3\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin; C:\Xilinx\13.3\ISE_DS\EDK\gnuwin\bin; C:\Xilinx\13.3\ISE_DS\common\bin\nt; C:\Xilinx\13.3\ISE_DS\common\lib\nt; C:\Program Files\Common Files\Microsoft Shared\Windows Live; C:\Windows\system32; C:\Windows; C:\Windows\System32\Wbem; C:\Windows\System32\WindowsPowerShell\v1.0\; C:\Program Files\Windows Live\Shared	C:\Xilinx\13.3\ISE_DS\ISE\\lib\nt; C:\Xilinx\13.3\ISE_DS\ISE\\bin\nt; C:\Xilinx\13.3\ISE_DS\PlanAhead\bin; C:\Xilinx\13.3\ISE_DS\ISE\bin\nt; C:\Xilinx\13.3\ISE_DS\ISE\lib\nt; C:\Xilinx\13.3\ISE_DS\EDK\bin\nt; C:\Xilinx\13.3\ISE_DS\EDK\lib\nt; C:\Xilinx\13.3\ISE_DS\EDK\gnu\microblaze\nt\bin; C:\Xilinx\13.3\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin; C:\Xilinx\13.3\ISE_DS\EDK\gnuwin\bin; C:\Xilinx\13.3\ISE_DS\common\bin\nt; C:\Xilinx\13.3\ISE_DS\common\lib\nt; C:\Program Files\Common Files\Microsoft Shared\Windows Live; C:\Windows\system32; C:\Windows; C:\Windows\System32\Wbem; C:\Windows\System32\WindowsPowerShell\v1.0\; C:\Program Files\Windows Live\Shared	C:\Xilinx\13.3\ISE_DS\ISE\\lib\nt; C:\Xilinx\13.3\ISE_DS\ISE\\bin\nt; C:\Xilinx\13.3\ISE_DS\PlanAhead\bin; C:\Xilinx\13.3\ISE_DS\ISE\bin\nt; C:\Xilinx\13.3\ISE_DS\ISE\lib\nt; C:\Xilinx\13.3\ISE_DS\EDK\bin\nt; C:\Xilinx\13.3\ISE_DS\EDK\lib\nt; C:\Xilinx\13.3\ISE_DS\EDK\gnu\microblaze\nt\bin; C:\Xilinx\13.3\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin; C:\Xilinx\13.3\ISE_DS\EDK\gnuwin\bin; C:\Xilinx\13.3\ISE_DS\common\bin\nt; C:\Xilinx\13.3\ISE_DS\common\lib\nt; C:\Program Files\Common Files\Microsoft Shared\Windows Live; C:\Windows\system32; C:\Windows; C:\Windows\System32\Wbem; C:\Windows\System32\WindowsPowerShell\v1.0\; C:\Program Files\Windows Live\Shared	C:\Xilinx\13.3\ISE_DS\ISE\\lib\nt; C:\Xilinx\13.3\ISE_DS\ISE\\bin\nt; C:\Xilinx\13.3\ISE_DS\PlanAhead\bin; C:\Xilinx\13.3\ISE_DS\ISE\bin\nt; C:\Xilinx\13.3\ISE_DS\ISE\lib\nt; C:\Xilinx\13.3\ISE_DS\EDK\bin\nt; C:\Xilinx\13.3\ISE_DS\EDK\lib\nt; C:\Xilinx\13.3\ISE_DS\EDK\gnu\microblaze\nt\bin; C:\Xilinx\13.3\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin; C:\Xilinx\13.3\ISE_DS\EDK\gnuwin\bin; C:\Xilinx\13.3\ISE_DS\common\bin\nt; C:\Xilinx\13.3\ISE_DS\common\lib\nt; C:\Program Files\Common Files\Microsoft Shared\Windows Live; C:\Windows\system32; C:\Windows; C:\Windows\System32\Wbem; C:\Windows\System32\WindowsPowerShell\v1.0\; C:\Program Files\Windows Live\Shared
XILINX	C:\Xilinx\13.3\ISE_DS\ISE\	C:\Xilinx\13.3\ISE_DS\ISE\	C:\Xilinx\13.3\ISE_DS\ISE\	C:\Xilinx\13.3\ISE_DS\ISE\
XILINX_DSP	C:\Xilinx\13.3\ISE_DS\ISE	C:\Xilinx\13.3\ISE_DS\ISE	C:\Xilinx\13.3\ISE_DS\ISE	C:\Xilinx\13.3\ISE_DS\ISE
XILINX_EDK	C:\Xilinx\13.3\ISE_DS\EDK	C:\Xilinx\13.3\ISE_DS\EDK	C:\Xilinx\13.3\ISE_DS\EDK	C:\Xilinx\13.3\ISE_DS\EDK
XILINX_PLANAHEAD	C:\Xilinx\13.3\ISE_DS\PlanAhead	C:\Xilinx\13.3\ISE_DS\PlanAhead	C:\Xilinx\13.3\ISE_DS\PlanAhead	C:\Xilinx\13.3\ISE_DS\PlanAhead

Synthesis Property Settings
Switch Name	Property Name	Value	Default Value
-ifn		SCHcounter_BTN.prj
-ifmt		mixed	MIXED
-ofn		SCHcounter_BTN
-ofmt		NGC	NGC
-p		xc3s1200e-4-fg320
-top		SCHcounter_BTN
-opt_mode	Optimization Goal	Speed	SPEED
-opt_level	Optimization Effort	1	1
-iuc	Use synthesis Constraints File	NO	NO
-keep_hierarchy	Keep Hierarchy	No	NO
-netlist_hierarchy	Netlist Hierarchy	As_Optimized	as_optimized
-rtlview	Generate RTL Schematic	Yes	NO
-glob_opt	Global Optimization Goal	AllClockNets	ALLCLOCKNETS
-read_cores	Read Cores	YES	YES
-write_timing_constraints	Write Timing Constraints	NO	NO
-cross_clock_analysis	Cross Clock Analysis	NO	NO
-bus_delimiter	Bus Delimiter	<>	<>
-slice_utilization_ratio	Slice Utilization Ratio	100	100%
-bram_utilization_ratio	BRAM Utilization Ratio	100	100%
-verilog2001	Verilog 2001	YES	YES
-fsm_extract		YES	YES
-fsm_encoding		Auto	AUTO
-safe_implementation		No	NO
-fsm_style		LUT	LUT
-ram_extract		Yes	YES
-ram_style		Auto	AUTO
-rom_extract		Yes	YES
-shreg_extract		YES	YES
-rom_style		Auto	AUTO
-auto_bram_packing		NO	NO
-resource_sharing		YES	YES
-async_to_sync		NO	NO
-mult_style		Auto	AUTO
-iobuf		YES	YES
-max_fanout		500	500
-bufg		24	24
-register_duplication		YES	YES
-register_balancing		No	NO
-optimize_primitives		NO	NO
-use_clock_enable		Yes	YES
-use_sync_set		Yes	YES
-use_sync_reset		Yes	YES
-iob		Auto	AUTO
-equivalent_register_removal		YES	YES
-slice_utilization_ratio_maxmargin		5	0%

Translation Property Settings
Switch Name	Property Name	Value	Default Value
-intstyle		ise	None
-dd		_ngo	None
-p		xc3s1200e-fg320-4	None

Map Property Settings
Switch Name	Property Name	Value	Default Value
-ir	Use RLOC Constraints	OFF	OFF
-cm	Optimization Strategy (Cover Mode)	area	area
-intstyle		ise	None
-o		SCHcounter_BTN_map.ncd	None
-pr	Pack I/O Registers/Latches into IOBs	off	off
-p		xc3s1200e-fg320-4	None

Place and Route Property Settings
Switch Name	Property Name	Value	Default Value
-t		1	1
-intstyle		ise
-ol	Place & Route Effort Level (Overall)	high	std
-w		true	false

Operating System Information
Operating System Information	xst	ngdbuild	map	par
CPU Architecture/Speed	Intel(R) Atom(TM) CPU N550 @ 1.50GHz/1496 MHz	Intel(R) Atom(TM) CPU N550 @ 1.50GHz/1496 MHz	Intel(R) Atom(TM) CPU N550 @ 1.50GHz/1496 MHz	Intel(R) Atom(TM) CPU N550 @ 1.50GHz/1496 MHz
Host	duo	duo	duo	duo
OS Name	Microsoft Windows 7 , 32-bit	Microsoft Windows 7 , 32-bit	Microsoft Windows 7 , 32-bit	Microsoft Windows 7 , 32-bit
OS Release	Service Pack 1 (build 7601)	Service Pack 1 (build 7601)	Service Pack 1 (build 7601)	Service Pack 1 (build 7601)