#include "main.h"
#include <util/delay.h>

void SPI_MasterInit(void)
{
/* Set MOSI, SCK and SS output, all others input */
DDRB = _BV(PB2) | _BV(PB3) | _BV(PB5);
// set MISO as input
DDRB &= ~_BV(PB4);

PORTB = _BV(PB5) | _BV(PB2);        // SCK and PB2 high

/* Enable SPI, Master, set clock rate fck/16 */
SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
}

unsigned char SPI_MasterTransmit(unsigned char sendData)
{
  /* Start transmission */
  SPDR = sendData;

  /* Wait for transmission complete */
  while(!(SPSR & (1<<SPIF))) {}

  return SPDR;
}

int main (void) 
{

  DDRC  |= 1 << DDC4; 
  DDRC  |= 1 << DDC5;
  DDRB  |= 1 << DDB2;

  SPI_MasterInit();
  
  lcd_init();
  lcd_clear();

  int8_t data;
  unsigned char x1;
  unsigned char x2;
  unsigned char datenbyte = 0x41;

// Initialisieren
//--------------------------------------------------------

	PORTB &= ~(1 << PB2);		// CS low
	_delay_us(1);
	SPI_MasterTransmit(0x06);	// WREN

	PORTB |= (1 << PB2);		// CS high
	_delay_us(1);
	PORTB &= ~(1 << PB2);		// CS low
	
	SPI_MasterTransmit(0x01);	// WSRS

	SPI_MasterTransmit(0x00); 	// NOPROT

	PORTB |= (1 << PB2);		// CS high
	_delay_us(10);
	PORTB &= ~(1 << PB2);		// CS low
  		
	while(1)
	{
	
	PORTC |= (1 << PC5);		// LED blinken
	_delay_ms(100);
	PORTC &= ~(1 << PC5);		
	_delay_ms(100);

	
// Schreibvorgang 1
//--------------------------------------------------------

	SPI_MasterTransmit(0x06);	// WREN

	PORTB |= (1 << PB2);		// CS high
	_delay_us(2);
	PORTB &= ~(1 << PB2);		// CS low

	SPI_MasterTransmit(0x02);	// WRITE

	SPI_MasterTransmit(0x00);	// MSB Address
	SPI_MasterTransmit(0x40); 	// LSB Address

	SPI_MasterTransmit(datenbyte); 	// Byte / ASCII 69, E

	PORTB |= (1 << PB2);		// CS high
	_delay_ms(5);				// TWC		Internal Write Cycle Time
	PORTB &= ~(1 << PB2);		// CS low

	PORTC |= (1 << PC4);		// LED blinken
	_delay_ms(500);
	PORTC &= ~(1 << PC4);

// Schreibvorgang 2
//--------------------------------------------------------

	SPI_MasterTransmit(0x06);	// WREN

	PORTB |= (1 << PB2);		// CS high
	_delay_us(2);
	PORTB &= ~(1 << PB2);		// CS low

	SPI_MasterTransmit(0x02);	// WRITE

	SPI_MasterTransmit(0x00);	// MSB Address
	SPI_MasterTransmit(0x60); 	// LSB Address
	
	datenbyte++;
	SPI_MasterTransmit(datenbyte); 	// Byte / ASCII 69, E

	PORTB |= (1 << PB2);		// CS high
	_delay_ms(5);				// TWC		Internal Write Cycle Time
	PORTB &= ~(1 << PB2);		// CS low

	PORTC |= (1 << PC4);		// LED blinken
	_delay_ms(500);
	PORTC &= ~(1 << PC4);
	

// Lesevorgang 1
//--------------------------------------------------------
	SPI_MasterTransmit(0x03);	// READ

	SPI_MasterTransmit(0x00); 	// MSB Address
	SPI_MasterTransmit(0x40); 	// LSB Address
	
	x1 = SPI_MasterTransmit(0x00); 	// Dummybyte

	PORTB |= (1 << PB2);		// CS high
	_delay_ms(1);				// TWC		Internal Write Cycle Time
	PORTB &= ~(1 << PB2);		// CS low

	lcd_setcursor(0,1);
	lcd_data(x1);

// Lesevorgang 2
//--------------------------------------------------------

	SPI_MasterTransmit(0x03);	// READ

	SPI_MasterTransmit(0x00); 	// MSB Address
	SPI_MasterTransmit(0x60); 	// LSB Address
	
	x2 = SPI_MasterTransmit(0x00); 	// Dummybyte
	PORTB &= ~(1 << PB2);		// CS low

	lcd_setcursor(0,2);
	lcd_data(x2);

	if(datenbyte == 0x5a) datenbyte = 0x41;
	
	}

}