//SPI
	/* ---------------------- Set Pin-Directions ----------------------*/  
	//Output: RES_TCPIP	SS		MOSI	SCK
	DDRB |= (1<<PINB3) | (1<<PINB4) | (1<<PINB6) | (1<<PINB7);
	//Input:	INT_TCPIP		MISO		
	DDRB &= ~(  (1<<PINB2) | (1<<PINB5)   );	
				
	/* ----------------------- Set Init-Levels -----------------------*/ 
	//High:	INT_TCPIP	SS		MISO
	PORTB |= (1<<PINB2) | (1<<PINB4) | (1<<PINB5);
	//Low:	  RES_TCPIP	  MOSI		SCK
	PORTB &= ~( (1<<PINB3) | (1<<PINB6) | (1<<PINB7) );
	
	
	SPCR |= (1<<MSTR);
	SPSR |= (1<<SPI2X);
	
	// SPI enable
	SPCR |= (1<<SPE);
	
	PORTB |= ( 1 << PINB3 );	// disable SPI Reset			


//8-bit timer 0
	TCNT0 = 0; 
	
	//timer/control register A 
	TCCR0A |= (1 << WGM01); //Clear timer on compare match
	TCCR0A &= ~ ( (1<<COM0A1) | (1<<COM0A0) | (1<<COM0B1) | (1<<COM0B0) | (1 << WGM00) );
	
	//Timer interrupt Mask Register
	TIMSK0 |=  (1 << OCIE0A); 
	TIMSK0 &=  ~( (1 << OCIE0B) | (1 << TOIE0) );
	
	//Compare value B of timer/counter 0 for interrupt
	OCR0A = 50;
	
	//Timer/Counter Control Register B
	//TCCR0B = FOC0A | FOC0B | - | - | WGM02 | CS02 | CS01 | CS00 |
	// no prescaling of clock (16MHz)  =>   CS00 = 1		CS01 = 0	CS02 = 0		
	TCCR0B |= (1 << CS00);	
	TCCR0B &= ~(  (1<<WGM02) | (1<<CS02) | (1<<CS01) );							


sei();	//enable global interrupts



// ---------- outside of main-function ---------- 

ISR(TIMER1_COMPA_vect)
{	
	//Generate clock for SPI at PIN B7
	PINB = (1<<PINB7);
	
}