;---------------------------------------------------------------------------- ; Paramerter ;---------------------------------------------------------------------------- .equ ADCA_PORT = ADCA_base // ADC Base Adresse .equ ADCA_Gain = 1 // ADC Gain Enable: Enabled(1) or Disabled(0) .equ ADCA_Prescale = ADC_PRESCALER_DIV32_gc // Prescalervalue: 1/4, 1/8, 1/16, .. ,1/512 F_Per .equ ADCA_CONVMODE = 0 // signed (1) or unsigned(0) .equ ADCA_Freerun = 1 // Freerun (1) or singlesamplemode (0) .equ ADCA_Resolution = ADC_RESOLUTION_LEFT12BIT_gc // ADC resolution: 8BIT 12BIT or LEFT12BIT .equ ADCA_REF = ADC_REFSEL_VCC_gc // ADC referncevoltage: INT1V, VCC, AREFA, AREFB .equ ADCA_Bandgap = 0 // enables the Internal Bandgap, if not startet .equ ADCA_Temp_ENABLE = 0 // enables the internal Temperatursenor .equ ADCA_Compare = 100 // ADC Compare value // EVENT SYSTEM NOCH NICHT INTEGRIERT .equ ADCA_Ch0_EN = 1 // ADC Channel Enable and Source selection .equ ADCA_Ch0_Source_neg = ADC_CH_MUXNEG_PIN0_gc // Negativ ADC Input: PIN0 .. PIN3, With Inputmode = DIFF(WGAIN) PIN0 = PIN4 .. PIN3 = PIN7 .equ ADCA_Ch0_Source_pos = ADC_CH_MUXPOS_PIN1_gc // Positive ADC Input: PIN0 .. PIN7 or ADC_CH_MUXINT_TEMP_gc, BANDGAP, SCALEDVCC, DAC .equ ADCA_Ch0_Gain = 1 // ADC Channel Gain set = 2^n max. 6 .equ ADCA_Ch0_Int_Mode = ADC_CH_INTMODE_ABOVE_gc // ADC Channel Interrupt Mode: COMPLETE, ABOVE or BELOW .equ ADCA_Ch0_Int_Level = 0 // ADC Channel Interrupt Level: 0 (disabled), 1 (Low), .. 3 (High) .equ ADCA_Ch0_Inputmode = ADC_CH_INPUTMODE_SINGLEENDED_gc // ADC Channel Inputmode: INTERNAL, SINGLEENDED, DIFF or DIFFWGAIN .equ ADCA_Ch1_EN = 1 // ADC Channel Enable and Source selection .equ ADCA_Ch1_Source_neg = ADC_CH_MUXNEG_PIN0_gc // Negativ ADC Input: PIN0 .. PIN3, With Inputmode = DIFF(WGAIN) PIN0 = PIN4 .. PIN3 = PIN7 .equ ADCA_Ch1_Source_pos = ADC_CH_MUXPOS_PIN2_gc // Positive ADC Input: PIN0 .. PIN7 or ADC_CH_MUXINT_TEMP_gc, BANDGAP, SCALEDVCC, DAC .equ ADCA_Ch1_Gain = 1 // ADC Channel Gain set = 2^n max. 6 .equ ADCA_Ch1_Int_Mode = ADC_CH_INTMODE_COMPLETE_gc // ADC Channel Interrupt Mode: COMPLETE, ABOVE or BELOW .equ ADCA_Ch1_Int_Level = 2 // ADC Channel Interrupt Level: 0 (disabled), 1 (Low), .. 3 (High) .equ ADCA_Ch1_Inputmode = ADC_CH_INPUTMODE_SINGLEENDED_gc // ADC Channel Inputmode: INTERNAL, SINGLEENDED, DIFF or DIFFWGAIN .equ ADCA_Ch2_EN = 0 // ADC Channel Enable and Source selection .equ ADCA_Ch2_Source_neg = ADC_CH_MUXNEG_PIN0_gc // Negativ ADC Input: PIN0 .. PIN3, With Inputmode = DIFF(WGAIN) PIN0 = PIN4 .. PIN3 = PIN7 .equ ADCA_Ch2_Source_pos = ADC_CH_MUXINT_DAC_gc // Positive ADC Input: PIN0 .. PIN7 or ADC_CH_MUXINT_TEMP_gc, BANDGAP, SCALEDVCC, DAC .equ ADCA_Ch2_Gain = 0 // ADC Channel Gain set = 2^n max. 6 .equ ADCA_Ch2_Int_Mode = ADC_CH_INTMODE_COMPLETE_gc // ADC Channel Interrupt Mode: COMPLETE, ABOVE or BELOW .equ ADCA_Ch2_Int_Level = 0 // ADC Channel Interrupt Level: 0 (disabled), 1 (Low), .. 3 (High) .equ ADCA_Ch2_Inputmode = ADC_CH_INPUTMODE_INTERNAL_gc // ADC Channel Inputmode: INTERNAL, SINGLEENDED, DIFF or DIFFWGAIN .equ ADCA_Ch3_EN = 0 // ADC Channel Enable and Source selection .equ ADCA_Ch3_Source_neg = ADC_CH_MUXNEG_PIN0_gc // Negativ ADC Input: PIN0 .. PIN3, With Inputmode = DIFF(WGAIN) PIN0 = PIN4 .. PIN3 = PIN7 .equ ADCA_Ch3_Source_pos = ADC_CH_MUXPOS_PIN2_gc // Positive ADC Input: PIN0 .. PIN7 or ADC_CH_MUXINT_TEMP_gc, BANDGAP, SCALEDVCC, DAC .equ ADCA_Ch3_Gain = 0 // ADC Channel Gain set = 2^n max. 6 .equ ADCA_Ch3_Int_Mode = ADC_CH_INTMODE_COMPLETE_gc // ADC Channel Interrupt Mode: COMPLETE, ABOVE or BELOW .equ ADCA_Ch3_Int_Level = 0 // ADC Channel Interrupt Level: 0 (disabled), 1 (Low), .. 3 (High) .equ ADCA_Ch3_Inputmode = ADC_CH_INPUTMODE_SINGLEENDED_gc // ADC Channel Inputmode: INTERNAL, SINGLEENDED, DIFF or DIFFWGAIN ;---------------------------------------------------------------------------- ; Errors ;---------------------------------------------------------------------------- .if((ADCA_Ch0_Gain > 6) | (ADCA_Ch1_Gain > 6) | (ADCA_Ch2_Gain > 6) | (ADCA_Ch3_Gain > 6)) .error "ADCA Gain to big" .endif .if (ADCA_CONVMODE == 0) .if((ADCA_Ch3_Inputmode > 1) | (ADCA_Ch3_Inputmode > 1) | (ADCA_Ch3_Inputmode > 1) | (ADCA_Ch3_Inputmode > 1)) .error "One or more ADC Inoutmodes is not possible, please check ADCA_CONVMODE or/and all ADCA_ChX_Inputmode parameters" .endif .endif //ADC_Init: //============================================================== /* \brief: * This function initialises the ADCA with the above settings * * \param: * -- * \return: * -- */ //============================================================== ADCA_Init: push R16 // ADC Flush ldi R16, ADC_Flush_bm sts ADC_CTRLA_offset + ADCA_Port, R16 // Prescaler einstellen ldi R16, ADCA_Prescale sts ADC_PRESCALER_offset + ADCA_Port, R16 // ADC CTRLB set ldi R16,((ADCA_CONVMODE << ADC_CONMODE_bp) | (ADCA_Freerun << ADC_Freerun_bp) | ADCA_Resolution) sts ADC_CTRLB_offset + ADCA_Port, R16 // ADC REFCTRL ldi R16,((ADCA_Temp_Enable << ADC_TEMPREF_bp) | (ADCA_Bandgap << ADC_BANDGAP_bp) | ADCA_REF) sts ADC_REFCTRL_offset + ADCA_Port, R16 // ADC CALIBRATION .if((ADCA_Port & 0x0f0) == 0x40) lds R16, NVM_PROD_SIGNATURES_ADCACAL0_offset sts ADC_CAL_offset + ADCA_Port, R16 lds R16, NVM_PROD_SIGNATURES_ADCACAL1_offset sts ADC_CAL_offset + 1 + ADCA_Port, R16 .else lds R16, NVM_PROD_SIGNATURES_ADCBCAL0_offset sts ADC_CAL_offset + ADCA_Port, R16 lds R16, NVM_PROD_SIGNATURES_ADCBCAL1_offset sts ADC_CAL_offset + 1 + ADCA_Port, R16 .endif // ADC CH0 init ldi R16, ((ADCA_Ch0_EN << ADC_CH_START_bp) | (ADCA_Ch0_Gain << ADC_CH_GAINFAC_gp) | (ADCA_Ch0_Inputmode)) sts ADC_CH0_offset + ADC_CH_CTRL_offset + ADCA_Port, R16 ldi R16, ((ADCA_Ch0_Source_pos) | (ADCA_Ch0_Source_neg)) sts ADC_CH0_offset + ADC_CH_MUXCTRL_offset + ADCA_Port, R16 ldi R16, ((ADCA_Ch0_Int_Mode) | (ADCA_Ch0_Int_Level << ADC_CH_INTLVL_gp)) sts ADC_CH0_offset + ADC_CH_INTCTRL_offset + ADCA_Port, R16 // ADC CH1 init ldi R16, ((ADCA_Ch1_EN << ADC_CH_START_bp) | (ADCA_Ch1_Gain << ADC_CH_GAINFAC_gp) | (ADCA_Ch1_Inputmode)) sts ADC_Ch1_offset + ADC_CH_CTRL_offset + ADCA_Port, R16 ldi R16, ((ADCA_Ch1_Source_pos) | (ADCA_Ch1_Source_neg)) sts ADC_Ch1_offset + ADC_CH_MUXCTRL_offset + ADCA_Port, R16 ldi R16, ((ADCA_Ch1_Int_Mode) | (ADCA_Ch1_Int_Level << ADC_CH_INTLVL_gp)) sts ADC_Ch1_offset + ADC_CH_INTCTRL_offset + ADCA_Port, R16 // ADC CH2 init ldi R16, ((ADCA_Ch2_EN << ADC_CH_START_bp) | (ADCA_Ch2_Gain << ADC_CH_GAINFAC_gp) | (ADCA_Ch2_Inputmode)) sts ADC_Ch2_offset + ADC_CH_CTRL_offset + ADCA_Port, R16 ldi R16, ((ADCA_Ch2_Source_pos) | (ADCA_Ch2_Source_neg)) sts ADC_Ch2_offset + ADC_CH_MUXCTRL_offset + ADCA_Port, R16 ldi R16, ((ADCA_Ch2_Int_Mode) | (ADCA_Ch2_Int_Level << ADC_CH_INTLVL_gp)) sts ADC_Ch2_offset + ADC_CH_INTCTRL_offset + ADCA_Port, R16 // ADC CH3 init ldi R16, ((ADCA_Ch3_EN << ADC_CH_START_bp) | (ADCA_Ch3_Gain << ADC_CH_GAINFAC_gp) | (ADCA_Ch3_Inputmode)) sts ADC_Ch3_offset + ADC_CH_CTRL_offset + ADCA_Port, R16 ldi R16, ((ADCA_Ch3_Source_pos) | (ADCA_Ch3_Source_neg)) sts ADC_Ch3_offset + ADC_CH_MUXCTRL_offset + ADCA_Port, R16 ldi R16, ((ADCA_Ch3_Int_Mode) | (ADCA_Ch3_Int_Level << ADC_CH_INTLVL_gp)) sts ADC_Ch3_offset + ADC_CH_INTCTRL_offset + ADCA_Port, R16 // ADC Compare set ldi R16, low(ADCA_Compare) sts ADC_CMP_offset + ADCA_Port, R16 ldi R16, high(ADCA_Compare) sts ADC_CMP_offset + 1 + ADCA_Port, R16 // EVENTCTRL ldi R16, (ADCA_SWEEP << ADC_SWEEP_gp) sts ADC_EVCTRL_offset + ADCA_Port,R16 // ADC Enable ldi R16, ((ADC_Enable_bm << ADC_ENABLE_bp) | (ADCA_Ch0_EN << ADC_CH0START_bp) | (ADCA_Ch1_EN << ADC_CH1START_bp) | (ADCA_Ch2_EN << ADC_CH2START_bp) | (ADCA_Ch3_EN << ADC_CH3START_bp)) sts ADC_CTRLA_offset + ADCA_Port, R16 pop R16 ret