spiCMD(0x0701); // operating mode: ready mode spiCMD(0x0500); // all interrupts off spiCMD(0x0600); // all interrupts off spiCMD(0x0800); // no Antenna diversity spiCMD(0x097f); // xtal load capacitance spiCMD(0x0A02); // uC CLK: 10MHz spiCMD(0x0cf2); // GPIO1: RX ANT - f2 spiCMD(0x0bf5); // GPIO0: TX_ANT - f5 spiCMD(0x0de3); // GPIO2: Direct Digial Input for Modulation spiCMD(0x0e00); //READ/WRITE GPIO values spiCMD(0x0f70); // ADC Input: GND spiCMD(0x1000); // ADC offset: 0 spiCMD(0x1200); // temp sensor calibration off spiCMD(0x1300); // temp sensor offset: 0 spiCMD(0x1C05); // IF bandwidth spiCMD(0x1d40); // enable AFC spiCMD(0x1e0A); // afc timing spiCMD(0x1f03); // afc timing spiCMD(0x2083); // Clock Recovery Oversampling Rate spiCMD(0x21C0); // Clock Recovery Offset 2 spiCMD(0x2213); // Clock Recovery Offset 1 spiCMD(0x23A9); // Clock Recovery Offset 0 spiCMD(0x2400); // Clock Recovery Timing Loop Gain 1 spiCMD(0x2504); // Clock Recovery Timing Loop Gain 0 spiCMD(0x2710); // RSSI Threashold: -120dB spiCMD(0x2A24); // AFC Limiter Value spiCMD(0x3000); // data access: Disable RX/TX packet handling, disable crc: CCIT spiCMD(0x3200); // header check disable spiCMD(0x3300); // no synchronisation // spiCMD(0x3410); // preamble length: 16 nibbles, = 64bits // spiCMD(0x3530); // preamble detection control: 6 nibbles = 24bits spiCMD(0x3600); // sync word 3 spiCMD(0x3700); // sync word 2 spiCMD(0x3800); // sync word 1 spiCMD(0x3900); // sync word 0 spiCMD(0x6900); // AGC off spiCMD(0x6a0b); // agc override 2 spiCMD(0x6d0F); // tx power: +17dBm spiCMD(0x6E13); // set baud high spiCMD(0x6Fa9); // set baud low spiCMD(0x7000); // modulation control spiCMD(0x7101); // modulation control 0: Direct mode, OOK spiCMD(0x7250); // frequency deviation: 45kHz spiCMD(0x7300); // offset: 0 spiCMD(0x7400); // offset: 0 spiCMD(0x7553); // 430-440MHz range //spiCMD(0x0705); // operating mode: tx mode