mig_36_1 Project Status (12/18/2012 - 11:17:18)
Project File: mig_36_1.xise Parser Errors: No Errors
Module Name: mig_36_1 Implementation State: Mapped (Failed)
Target Device: xc6slx16-2csg324
  • Errors:
X 2 Errors (2 new)
Product Version:ISE 14.3
  • Warnings:
367 Warnings (367 new)
Design Goal: Balanced
  • Routing Results:
 
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment: System Settings
  • Final Timing Score:
  
 
Device Utilization Summary [-]
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentDi 18. Dez 11:15:05 20120366 Warnings (366 new)104 Infos (104 new)
Translation ReportCurrentDi 18. Dez 11:17:05 201201 Warning (1 new)4 Infos (0 new)
Map ReportCurrentDi 18. Dez 11:17:16 2012X 2 Errors (2 new)06 Infos (3 new)
Place and Route Report     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated

Date Generated: 12/18/2012 - 11:17:18