Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:14.4 (WebPack) - P.49d Target Family: Spartan6
OS Platform: NT64 Target Device: xc6slx45
Project ID (random number) 7381c430ad1c4594a15151cb8138fa5a.092518666C0E42138DB2B1C9639FBF22.4 Target Package: fgg484
Registration ID 210720632_0_0_157 Target Speed: -2
Date Generated 2013-05-13T13:57:13 Tool Flow ISE
 
User Environment
OS Name Microsoft Windows 7 , 64-bit OS Release Service Pack 1 (build 7601)
CPU Name Pentium(R) Dual-Core CPU T4500 @ 2.30GHz CPU Speed 2294 MHz
OS Name Microsoft Windows 7 , 64-bit OS Release Service Pack 1 (build 7601)
CPU Name Pentium(R) Dual-Core CPU T4500 @ 2.30GHz CPU Speed 2294 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
FSMs=2 Multiplexers=16
  • 1-bit 2-to-1 multiplexer=4
  • 16-bit 2-to-1 multiplexer=6
  • 4-bit 2-to-1 multiplexer=6
Registers=52
  • Flip-Flops=52
MiscellaneousStatistics
  • AGG_BONDED_IO=27
  • AGG_IO=27
  • AGG_SLICE=348
  • NUM_BONDED_IOB=27
  • NUM_BSFULL=352
  • NUM_BSLUTONLY=335
  • NUM_BSREGONLY=193
  • NUM_BSUSED=880
  • NUM_BUFG=1
  • NUM_DPRAM_O5ANDO6=63
  • NUM_DPRAM_O5ONLY=1
  • NUM_DPRAM_O6ONLY=22
  • NUM_LOGIC_O5ANDO6=169
  • NUM_LOGIC_O5ONLY=27
  • NUM_LOGIC_O6ONLY=367
  • NUM_LUT_RT_DRIVES_CARRY4=1
  • NUM_LUT_RT_DRIVES_FLOP=36
  • NUM_LUT_RT_EXO5=36
  • NUM_LUT_RT_EXO6=1
  • NUM_LUT_RT_O5=5
  • NUM_LUT_RT_O6=27
  • NUM_RAMB8BWER=3
  • NUM_SLICEL=38
  • NUM_SLICEM=27
  • NUM_SLICEX=283
  • NUM_SLICE_CARRY4=38
  • NUM_SLICE_CONTROLSET=93
  • NUM_SLICE_CYINIT=964
  • NUM_SLICE_F7MUX=2
  • NUM_SLICE_FF=623
  • NUM_SLICE_LATCH=1
  • NUM_SLICE_UNUSEDCTRL=62
  • NUM_SRL_O6ONLY=1
  • NUM_UNUSABLE_FF_BELS=426
  • Xilinx Core axi_vfifo_ctrl_v1_1, Xilinx CORE Generator 14.4=1
NetStatistics
  • NumNets_Active=1181
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEACROSS=34
  • NumNodesOfType_Active_BOUNCEIN=181
  • NumNodesOfType_Active_BUFGOUT=1
  • NumNodesOfType_Active_BUFHINP2OUT=3
  • NumNodesOfType_Active_CLKPIN=286
  • NumNodesOfType_Active_CLKPINFEED=3
  • NumNodesOfType_Active_CNTRLPIN=306
  • NumNodesOfType_Active_DOUBLE=1094
  • NumNodesOfType_Active_GENERIC=3
  • NumNodesOfType_Active_GLOBAL=65
  • NumNodesOfType_Active_INPUT=189
  • NumNodesOfType_Active_IOBIN2OUT=1
  • NumNodesOfType_Active_IOBOUTPUT=1
  • NumNodesOfType_Active_LUTINPUT=2448
  • NumNodesOfType_Active_OUTBOUND=1149
  • NumNodesOfType_Active_OUTPUT=1158
  • NumNodesOfType_Active_PADOUTPUT=2
  • NumNodesOfType_Active_PINBOUNCE=840
  • NumNodesOfType_Active_PINFEED=3016
  • NumNodesOfType_Active_QUAD=268
  • NumNodesOfType_Active_REGINPUT=325
  • NumNodesOfType_Active_SINGLE=2014
  • NumNodesOfType_Gnd_BOUNCEIN=88
  • NumNodesOfType_Gnd_DOUBLE=30
  • NumNodesOfType_Gnd_GENERIC=25
  • NumNodesOfType_Gnd_HGNDOUT=53
  • NumNodesOfType_Gnd_INPUT=123
  • NumNodesOfType_Gnd_IOBIN2OUT=25
  • NumNodesOfType_Gnd_IOBOUTPUT=25
  • NumNodesOfType_Gnd_LUTINPUT=276
  • NumNodesOfType_Gnd_OUTBOUND=39
  • NumNodesOfType_Gnd_OUTPUT=47
  • NumNodesOfType_Gnd_PADINPUT=25
  • NumNodesOfType_Gnd_PINBOUNCE=102
  • NumNodesOfType_Gnd_PINFEED=401
  • NumNodesOfType_Gnd_REGINPUT=38
  • NumNodesOfType_Gnd_SINGLE=51
  • NumNodesOfType_Vcc_CNTRLPIN=1
  • NumNodesOfType_Vcc_HVCCOUT=124
  • NumNodesOfType_Vcc_INPUT=8
  • NumNodesOfType_Vcc_KVCCOUT=7
  • NumNodesOfType_Vcc_LUTINPUT=357
  • NumNodesOfType_Vcc_PINBOUNCE=5
  • NumNodesOfType_Vcc_PINFEED=363
  • NumNodesOfType_Vcc_REGINPUT=2
SiteStatistics
  • BUFG-BUFGMUX=1
  • IOB-IOBM=13
  • IOB-IOBS=14
  • SLICEL-SLICEM=22
  • SLICEX-SLICEL=63
  • SLICEX-SLICEM=52
SiteSummary
  • BUFG=1
  • BUFG_BUFG=1
  • CARRY4=38
  • FF_SR=89
  • HARD0=4
  • HARD1=9
  • IOB=27
  • IOB_IMUX=2
  • IOB_INBUF=2
  • IOB_OUTBUF=25
  • LUT5=232
  • LUT6=558
  • LUT_OR_MEM5=69
  • LUT_OR_MEM6=92
  • PAD=27
  • RAMB8BWER=3
  • RAMB8BWER_RAMB8BWER=3
  • REG_SR=535
  • SELMUX2_1=2
  • SLICEL=38
  • SLICEM=27
  • SLICEX=283
 
Configuration Data
FF_SR
  • CK=[CK:89] [CK_INV:0]
  • SRINIT=[SRINIT0:82] [SRINIT1:7]
  • SYNC_ATTR=[ASYNC:68] [SYNC:21]
IOB_OUTBUF
  • DRIVEATTRBOX=[12:25]
  • SLEW=[SLOW:25]
  • SUSPEND=[3STATE:25]
LUT_OR_MEM5
  • CLK=[CLK:64] [CLK_INV:0]
  • LUT_OR_MEM=[LUT:5] [RAM:64]
  • RAMMODE=[DPRAM32:64]
LUT_OR_MEM6
  • CLK=[CLK:86] [CLK_INV:0]
  • LUT_OR_MEM=[LUT:6] [RAM:86]
  • RAMMODE=[SRL16:1] [DPRAM32:63] [DPRAM64:22]
OLOGIC2
  • CLK0=[CLK0_INV:0] [CLK0:1]
OLOGIC2_OUTFF
  • CK0=[CK0_INV:0] [CK0:1]
  • OUTFFTYPE=[FF:1]
  • SRINIT_OQ=[0:1]
RAMB8BWER
  • CLKAWRCLK=[CLKAWRCLK:3] [CLKAWRCLK_INV:0]
  • CLKBRDCLK=[CLKBRDCLK_INV:0] [CLKBRDCLK:3]
  • ENAWREN=[ENAWREN:3] [ENAWREN_INV:0]
  • ENBRDEN=[ENBRDEN_INV:0] [ENBRDEN:3]
  • REGCEA=[REGCEA_INV:0] [REGCEA:3]
  • REGCEBREGCE=[REGCEBREGCE_INV:0] [REGCEBREGCE:3]
  • RSTA=[RSTA:3] [RSTA_INV:0]
  • RSTBRST=[RSTBRST:3] [RSTBRST_INV:0]
  • WEAWEL0=[WEAWEL0:3] [WEAWEL0_INV:0]
  • WEAWEL1=[WEAWEL1_INV:0] [WEAWEL1:3]
  • WEBWEU0=[WEBWEU0:3] [WEBWEU0_INV:0]
  • WEBWEU1=[WEBWEU1:3] [WEBWEU1_INV:0]
RAMB8BWER_RAMB8BWER
  • CLKAWRCLK=[CLKAWRCLK:3] [CLKAWRCLK_INV:0]
  • CLKBRDCLK=[CLKBRDCLK_INV:0] [CLKBRDCLK:3]
  • DATA_WIDTH_A=[18:1] [36:2]
  • DATA_WIDTH_B=[18:1] [36:2]
  • DOA_REG=[0:3]
  • DOB_REG=[0:3]
  • ENAWREN=[ENAWREN:3] [ENAWREN_INV:0]
  • ENBRDEN=[ENBRDEN_INV:0] [ENBRDEN:3]
  • EN_RSTRAM_A=[TRUE:3]
  • EN_RSTRAM_B=[TRUE:3]
  • RAM_MODE=[TDP:1] [SDP:2]
  • REGCEA=[REGCEA_INV:0] [REGCEA:3]
  • REGCEBREGCE=[REGCEBREGCE_INV:0] [REGCEBREGCE:3]
  • RSTA=[RSTA:3] [RSTA_INV:0]
  • RSTBRST=[RSTBRST:3] [RSTBRST_INV:0]
  • RSTTYPE=[SYNC:3]
  • RST_PRIORITY_A=[CE:3]
  • RST_PRIORITY_B=[CE:3]
  • WEAWEL0=[WEAWEL0:3] [WEAWEL0_INV:0]
  • WEAWEL1=[WEAWEL1_INV:0] [WEAWEL1:3]
  • WEBWEU0=[WEBWEU0:3] [WEBWEU0_INV:0]
  • WEBWEU1=[WEBWEU1:3] [WEBWEU1_INV:0]
  • WRITE_MODE_A=[READ_FIRST:3]
  • WRITE_MODE_B=[READ_FIRST:3]
REG_SR
  • CK=[CK:534] [CK_INV:1]
  • LATCH_OR_FF=[FF:534] [LATCH:1]
  • SRINIT=[SRINIT0:449] [SRINIT1:86]
  • SYNC_ATTR=[ASYNC:422] [SYNC:113]
SLICEL
  • CLK=[CLK:17] [CLK_INV:1]
SLICEM
  • CLK=[CLK:27] [CLK_INV:0]
SLICEX
  • CLK=[CLK:241] [CLK_INV:0]
 
Pin Data
BUFG
  • I0=1
  • O=1
BUFG_BUFG
  • I0=1
  • O=1
CARRY4
  • CIN=23
  • CO0=8
  • CO2=1
  • CO3=23
  • CYINIT=15
  • DI0=38
  • DI1=26
  • DI2=25
  • DI3=23
  • O0=17
  • O1=20
  • O2=16
  • O3=15
  • S0=38
  • S1=30
  • S2=26
  • S3=24
FF_SR
  • CE=52
  • CK=89
  • D=89
  • Q=89
  • SR=68
HARD0
  • 0=4
HARD1
  • 1=9
IOB
  • I=2
  • O=25
  • PAD=27
IOB_IMUX
  • I=2
  • OUT=2
IOB_INBUF
  • OUT=2
  • PAD=2
IOB_OUTBUF
  • IN=25
  • OUT=25
LUT5
  • A1=47
  • A2=67
  • A3=110
  • A4=93
  • A5=113
  • O5=232
LUT6
  • A1=168
  • A2=301
  • A3=376
  • A4=477
  • A5=521
  • A6=546
  • O6=558
LUT_OR_MEM5
  • A1=64
  • A2=64
  • A3=66
  • A4=66
  • A5=66
  • CLK=64
  • DI1=64
  • O5=63
  • WA1=64
  • WA2=64
  • WA3=64
  • WA4=64
  • WA5=64
  • WE=64
LUT_OR_MEM6
  • A1=88
  • A2=88
  • A3=89
  • A4=91
  • A5=91
  • A6=92
  • CLK=86
  • DI1=22
  • DI2=64
  • O6=62
  • WA1=85
  • WA2=85
  • WA3=85
  • WA4=85
  • WA5=85
  • WA6=85
  • WE=86
OLOGIC2
  • CLK0=1
  • D1=1
  • OQ=1
OLOGIC2_OUTFF
  • CK0=1
  • D1=1
  • Q=1
PAD
  • PAD=27
RAMB8BWER
  • ADDRAWRADDR0=3
  • ADDRAWRADDR1=3
  • ADDRAWRADDR10=3
  • ADDRAWRADDR11=3
  • ADDRAWRADDR12=3
  • ADDRAWRADDR2=3
  • ADDRAWRADDR3=3
  • ADDRAWRADDR4=3
  • ADDRAWRADDR5=3
  • ADDRAWRADDR6=3
  • ADDRAWRADDR7=3
  • ADDRAWRADDR8=3
  • ADDRAWRADDR9=3
  • ADDRBRDADDR0=3
  • ADDRBRDADDR1=3
  • ADDRBRDADDR10=3
  • ADDRBRDADDR11=3
  • ADDRBRDADDR12=3
  • ADDRBRDADDR2=3
  • ADDRBRDADDR3=3
  • ADDRBRDADDR4=3
  • ADDRBRDADDR5=3
  • ADDRBRDADDR6=3
  • ADDRBRDADDR7=3
  • ADDRBRDADDR8=3
  • ADDRBRDADDR9=3
  • CLKAWRCLK=3
  • CLKBRDCLK=3
  • DIADI0=3
  • DIADI1=3
  • DIADI10=3
  • DIADI11=3
  • DIADI12=3
  • DIADI13=3
  • DIADI14=3
  • DIADI15=3
  • DIADI2=3
  • DIADI3=3
  • DIADI4=3
  • DIADI5=3
  • DIADI6=3
  • DIADI7=3
  • DIADI8=3
  • DIADI9=3
  • DIBDI0=3
  • DIBDI1=3
  • DIBDI10=3
  • DIBDI11=3
  • DIBDI12=3
  • DIBDI13=3
  • DIBDI14=3
  • DIBDI15=3
  • DIBDI2=3
  • DIBDI3=3
  • DIBDI4=3
  • DIBDI5=3
  • DIBDI6=3
  • DIBDI7=3
  • DIBDI8=3
  • DIBDI9=3
  • DIPADIP0=3
  • DIPADIP1=3
  • DIPBDIP0=3
  • DIPBDIP1=3
  • DOADO0=2
  • DOADO1=2
  • DOADO10=1
  • DOADO2=2
  • DOADO3=2
  • DOADO8=2
  • DOADO9=2
  • DOBDO0=2
  • DOBDO1=1
  • DOBDO10=2
  • DOBDO11=1
  • DOBDO12=1
  • DOBDO14=1
  • DOBDO2=1
  • DOBDO6=1
  • DOBDO7=1
  • DOBDO8=2
  • DOBDO9=2
  • ENAWREN=3
  • ENBRDEN=3
  • REGCEA=3
  • REGCEBREGCE=3
  • RSTA=3
  • RSTBRST=3
  • WEAWEL0=3
  • WEAWEL1=3
  • WEBWEU0=3
  • WEBWEU1=3
RAMB8BWER_RAMB8BWER
  • ADDRAWRADDR0=3
  • ADDRAWRADDR1=3
  • ADDRAWRADDR10=3
  • ADDRAWRADDR11=3
  • ADDRAWRADDR12=3
  • ADDRAWRADDR2=3
  • ADDRAWRADDR3=3
  • ADDRAWRADDR4=3
  • ADDRAWRADDR5=3
  • ADDRAWRADDR6=3
  • ADDRAWRADDR7=3
  • ADDRAWRADDR8=3
  • ADDRAWRADDR9=3
  • ADDRBRDADDR0=3
  • ADDRBRDADDR1=3
  • ADDRBRDADDR10=3
  • ADDRBRDADDR11=3
  • ADDRBRDADDR12=3
  • ADDRBRDADDR2=3
  • ADDRBRDADDR3=3
  • ADDRBRDADDR4=3
  • ADDRBRDADDR5=3
  • ADDRBRDADDR6=3
  • ADDRBRDADDR7=3
  • ADDRBRDADDR8=3
  • ADDRBRDADDR9=3
  • CLKAWRCLK=3
  • CLKBRDCLK=3
  • DIADI0=3
  • DIADI1=3
  • DIADI10=3
  • DIADI11=3
  • DIADI12=3
  • DIADI13=3
  • DIADI14=3
  • DIADI15=3
  • DIADI2=3
  • DIADI3=3
  • DIADI4=3
  • DIADI5=3
  • DIADI6=3
  • DIADI7=3
  • DIADI8=3
  • DIADI9=3
  • DIBDI0=3
  • DIBDI1=3
  • DIBDI10=3
  • DIBDI11=3
  • DIBDI12=3
  • DIBDI13=3
  • DIBDI14=3
  • DIBDI15=3
  • DIBDI2=3
  • DIBDI3=3
  • DIBDI4=3
  • DIBDI5=3
  • DIBDI6=3
  • DIBDI7=3
  • DIBDI8=3
  • DIBDI9=3
  • DIPADIP0=3
  • DIPADIP1=3
  • DIPBDIP0=3
  • DIPBDIP1=3
  • DOADO0=2
  • DOADO1=2
  • DOADO10=1
  • DOADO2=2
  • DOADO3=2
  • DOADO8=2
  • DOADO9=2
  • DOBDO0=2
  • DOBDO1=1
  • DOBDO10=2
  • DOBDO11=1
  • DOBDO12=1
  • DOBDO14=1
  • DOBDO2=1
  • DOBDO6=1
  • DOBDO7=1
  • DOBDO8=2
  • DOBDO9=2
  • ENAWREN=3
  • ENBRDEN=3
  • REGCEA=3
  • REGCEBREGCE=3
  • RSTA=3
  • RSTBRST=3
  • WEAWEL0=3
  • WEAWEL1=3
  • WEBWEU0=3
  • WEBWEU1=3
REG_SR
  • CE=255
  • CK=535
  • D=535
  • Q=535
  • SR=358
SELMUX2_1
  • 0=2
  • 1=2
  • OUT=2
  • S0=2
SLICEL
  • A1=4
  • A2=13
  • A3=14
  • A4=24
  • A5=37
  • A6=37
  • AMUX=17
  • AQ=10
  • AX=9
  • B=2
  • B1=5
  • B2=14
  • B3=15
  • B4=18
  • B5=33
  • B6=33
  • BMUX=9
  • BQ=15
  • BX=7
  • C1=1
  • C2=11
  • C3=15
  • C4=17
  • C5=30
  • C6=30
  • CE=3
  • CIN=21
  • CLK=18
  • CMUX=14
  • COUT=23
  • CQ=11
  • CX=8
  • D=1
  • D1=5
  • D2=14
  • D3=17
  • D4=18
  • D5=31
  • D6=31
  • DMUX=14
  • DQ=13
  • DX=7
  • SR=16
SLICEM
  • A=18
  • A1=20
  • A2=20
  • A3=23
  • A4=23
  • A5=23
  • A6=22
  • AI=16
  • AMUX=20
  • AQ=7
  • AX=17
  • B=22
  • B1=25
  • B2=25
  • B3=25
  • B4=25
  • B5=25
  • B6=26
  • BI=16
  • BMUX=17
  • BQ=10
  • BX=13
  • C=13
  • C1=18
  • C2=18
  • C3=18
  • C4=18
  • C5=18
  • C6=18
  • CE=27
  • CI=16
  • CIN=2
  • CLK=27
  • CMUX=14
  • CQ=5
  • CX=17
  • D1=26
  • D2=26
  • D3=26
  • D4=26
  • D5=26
  • D6=26
  • DI=16
  • DMUX=13
  • DX=26
  • SR=1
  • WE=10
SLICEX
  • A=84
  • A1=65
  • A2=104
  • A3=132
  • A4=167
  • A5=168
  • A6=160
  • AMUX=53
  • AQ=208
  • AX=104
  • B=68
  • B1=53
  • B2=86
  • B3=96
  • B4=103
  • B5=108
  • B6=106
  • BMUX=34
  • BQ=110
  • BX=70
  • C=48
  • C1=34
  • C2=49
  • C3=59
  • C4=70
  • C5=75
  • C6=76
  • CE=86
  • CLK=241
  • CMUX=24
  • CQ=83
  • CX=50
  • D=53
  • D1=33
  • D2=48
  • D3=61
  • D4=67
  • D5=75
  • D6=73
  • DMUX=27
  • DQ=63
  • DX=37
  • SR=174
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -i -p xc6slx45-fgg484-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx45-fgg484-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -i -p xc6slx45-fgg484-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx45-fgg484-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -filter <ise_file>
  • ngdbuild -filter <ise_file> -intstyle ise -dd _ngo -sd <dname> -nt timestamp -i -p xc6slx45-fgg484-2 <fname>.ngc <fname>.ngd
  • map -filter <ise_file> -intstyle ise -p xc6slx45-fgg484-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -filter <ise_file> -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -filter <fname>.filter -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -filter <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -filter <ise_file>
  • xst -intstyle ise -filter <ise_file>
  • xst -intstyle ise -filter <ise_file>
  • xst -intstyle ise -filter <ise_file>
  • xst -intstyle ise -filter <ise_file>
  • xst -intstyle ise -filter <ise_file>
  • ngdbuild -filter <ise_file> -intstyle ise -dd _ngo -sd <dname> -nt timestamp -i -p xc6slx45-fgg484-2 <fname>.ngc <fname>.ngd
  • map -filter <ise_file> -intstyle ise -p xc6slx45-fgg484-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -filter <ise_file> -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -filter <fname>.filter -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -filter <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • fuse
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
_impact 41 36 0 0 0 0 0
bitgen 34 34 0 0 0 0 0
elfcheck 2 2 0 0 0 0 0
libgen 1 1 0 0 0 0 0
map 41 36 0 0 0 0 0
netgen 10 10 0 0 0 0 0
ngc2edif 1 1 0 0 0 0 0
ngcbuild 76 75 0 0 0 0 0
ngdbuild 79 79 0 0 0 0 0
obngc 2 2 0 0 0 0 0
par 36 36 0 0 0 0 0
platgen 4 0 0 0 0 0 0
psf2Edward 2 2 0 0 0 0 0
simgen 1 1 0 0 0 0 0
trce 36 36 0 0 0 0 0
xdsgen 2 2 0 0 0 0 0
xps 22 17 0 0 0 0 0
xst 398 390 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/isehelp/rtv_db_lut_content.htm ( 1 ) /doc/usenglish/platform_studio/ps_p_app_launching_sdk.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=true PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_SelectedInstanceHierarchicalPath=/tb_top_2 PROP_Simulator=ISim (VHDL/Verilog)
PROP_SynthTopFile=changed PROP_Top_Level_Module_Type=HDL
PROP_UseSmartGuide=false PROP_UserConstraintEditorPreference=Text Editor
PROP_intProjectCreationTimestamp=2013-05-08T12:04:35 PROP_intWbtProjectID=092518666C0E42138DB2B1C9639FBF22
PROP_intWbtProjectIteration=4 PROP_intWorkingDirLocWRTProjDir=Same
PROP_intWorkingDirUsed=No PROP_selectedSimRootSourceNode_behav=work.tb_top_2
PROP_xilxBitgStart_IntDone=true PROP_AutoTop=true
PROP_DevFamily=Spartan6 PROP_DevDevice=xc6slx45
PROP_DevFamilyPMName=spartan6 PROP_DevPackage=fgg484
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_DevSpeed=-2
PROP_PreferredLanguage=Verilog FILE_COREGEN=2
FILE_VHDL=4
 
Core Statistics
Core Type=axi_vfifo_ctrl_v1_1
c_ar_weight_ch0=8 c_ar_weight_ch1=8 c_ar_weight_ch2=8 c_ar_weight_ch3=8
c_ar_weight_ch4=8 c_ar_weight_ch5=8 c_ar_weight_ch6=8 c_ar_weight_ch7=8
c_axi_addr_width=32 c_axi_burst_size=512 c_axis_tdata_width=32 c_axis_tid_width=1
c_axis_tuser_width=1 c_deassert_tready=0 c_dram_base_addr=80000000 c_enable_interrupt=0
c_family=spartan6 c_has_axis_tid=1 c_has_axis_tuser=1 c_implementation_type=0
c_num_channel=2 c_num_page_ch0=8 c_num_page_ch1=8 c_num_page_ch2=8
c_num_page_ch3=8 c_num_page_ch4=8 c_num_page_ch5=8 c_num_page_ch6=8
c_num_page_ch7=8 c_s2mm_txn_timeout_val=8
Core Type=blk_mem_gen_v7_1
c_addra_width=7 c_addrb_width=7 c_algorithm=1 c_axi_id_width=4
c_axi_slave_type=1 c_axi_type=1 c_byte_size=9 c_common_clk=1
c_default_data=0 c_disable_warn_bhv_coll=0 c_disable_warn_bhv_range=0 c_elaboration_dir=masked_value
c_enable_32bit_address=0 c_family=spartan6 c_has_axi_id=1 c_has_ena=1
c_has_enb=1 c_has_injecterr=0 c_has_mem_output_regs_a=0 c_has_mem_output_regs_b=0
c_has_mux_output_regs_a=0 c_has_mux_output_regs_b=0 c_has_regcea=0 c_has_regceb=0
c_has_rsta=0 c_has_rstb=1 c_has_softecc_input_regs_a=0 c_has_softecc_output_regs_b=0
c_init_file_name=no_coe_file_loaded c_inita_val=0 c_initb_val=0 c_interface_type=0
c_load_init_file=0 c_mem_type=1 c_mux_pipeline_stages=0 c_prim_type=3
c_read_depth_a=128 c_read_depth_b=128 c_read_width_a=15 c_read_width_b=15
c_rst_priority_a=CE c_rst_priority_b=CE c_rst_type=SYNC c_rstram_a=0
c_rstram_b=0 c_sim_collision_check=ALL c_use_byte_wea=0 c_use_byte_web=0
c_use_default_data=0 c_use_ecc=0 c_use_softecc=0 c_wea_width=1
c_web_width=1 c_write_depth_a=128 c_write_depth_b=128 c_write_mode_a=READ_FIRST
c_write_mode_b=READ_FIRST c_write_width_a=15 c_write_width_b=15 c_xdevicefamily=spartan6
Core Type=blk_mem_gen_v7_1
c_addra_width=7 c_addrb_width=7 c_algorithm=1 c_axi_id_width=4
c_axi_slave_type=1 c_axi_type=1 c_byte_size=9 c_common_clk=1
c_default_data=0 c_disable_warn_bhv_coll=0 c_disable_warn_bhv_range=0 c_elaboration_dir=masked_value
c_enable_32bit_address=0 c_family=spartan6 c_has_axi_id=1 c_has_ena=1
c_has_enb=1 c_has_injecterr=0 c_has_mem_output_regs_a=0 c_has_mem_output_regs_b=0
c_has_mux_output_regs_a=0 c_has_mux_output_regs_b=0 c_has_regcea=0 c_has_regceb=0
c_has_rsta=0 c_has_rstb=1 c_has_softecc_input_regs_a=0 c_has_softecc_output_regs_b=0
c_init_file_name=no_coe_file_loaded c_inita_val=0 c_initb_val=0 c_interface_type=0
c_load_init_file=0 c_mem_type=1 c_mux_pipeline_stages=0 c_prim_type=3
c_read_depth_a=128 c_read_depth_b=128 c_read_width_a=13 c_read_width_b=13
c_rst_priority_a=CE c_rst_priority_b=CE c_rst_type=SYNC c_rstram_a=0
c_rstram_b=0 c_sim_collision_check=ALL c_use_byte_wea=0 c_use_byte_web=0
c_use_default_data=0 c_use_ecc=0 c_use_softecc=0 c_wea_width=1
c_web_width=1 c_write_depth_a=128 c_write_depth_b=128 c_write_mode_a=READ_FIRST
c_write_mode_b=READ_FIRST c_write_width_a=13 c_write_width_b=13 c_xdevicefamily=spartan6
Core Type=fifo_generator_v9_1
c_add_ngc_constraint=0 c_application_type_axis=0 c_application_type_rach=0 c_application_type_rdch=0
c_application_type_wach=0 c_application_type_wdch=0 c_application_type_wrch=0 c_axi_addr_width=32
c_axi_aruser_width=1 c_axi_awuser_width=1 c_axi_buser_width=1 c_axi_data_width=64
c_axi_id_width=4 c_axi_ruser_width=1 c_axi_type=0 c_axi_wuser_width=1
c_axis_tdata_width=64 c_axis_tdest_width=4 c_axis_tid_width=8 c_axis_tkeep_width=4
c_axis_tstrb_width=4 c_axis_tuser_width=4 c_axis_type=0 c_common_clock=1
c_count_type=0 c_data_count_width=1 c_default_value=0 c_din_width=41
c_din_width_axis=1 c_din_width_rach=32 c_din_width_rdch=64 c_din_width_wach=32
c_din_width_wdch=64 c_din_width_wrch=2 c_dout_rst_val=0 c_dout_width=41
c_enable_rlocs=0 c_enable_rst_sync=1 c_error_injection_type=0 c_error_injection_type_axis=0
c_error_injection_type_rach=0 c_error_injection_type_rdch=0 c_error_injection_type_wach=0 c_error_injection_type_wdch=0
c_error_injection_type_wrch=0 c_family=spartan6 c_full_flags_rst_val=1 c_has_almost_empty=0
c_has_almost_full=0 c_has_axi_aruser=0 c_has_axi_awuser=0 c_has_axi_buser=0
c_has_axi_rd_channel=0 c_has_axi_ruser=0 c_has_axi_wr_channel=0 c_has_axi_wuser=0
c_has_axis_tdata=0 c_has_axis_tdest=0 c_has_axis_tid=0 c_has_axis_tkeep=0
c_has_axis_tlast=0 c_has_axis_tready=0 c_has_axis_tstrb=0 c_has_axis_tuser=0
c_has_backup=0 c_has_data_count=0 c_has_data_counts_axis=0 c_has_data_counts_rach=0
c_has_data_counts_rdch=0 c_has_data_counts_wach=0 c_has_data_counts_wdch=0 c_has_data_counts_wrch=0
c_has_int_clk=0 c_has_master_ce=0 c_has_meminit_file=0 c_has_overflow=0
c_has_prog_flags_axis=0 c_has_prog_flags_rach=0 c_has_prog_flags_rdch=0 c_has_prog_flags_wach=0
c_has_prog_flags_wdch=0 c_has_prog_flags_wrch=0 c_has_rd_data_count=0 c_has_rd_rst=0
c_has_rst=1 c_has_slave_ce=0 c_has_srst=0 c_has_underflow=0
c_has_valid=0 c_has_wr_ack=0 c_has_wr_data_count=0 c_has_wr_rst=0
c_implementation_type=0 c_implementation_type_axis=1 c_implementation_type_rach=1 c_implementation_type_rdch=1
c_implementation_type_wach=1 c_implementation_type_wdch=1 c_implementation_type_wrch=1 c_init_wr_pntr_val=0
c_interface_type=0 c_memory_type=2 c_mif_file_name=0 c_msgon_val=0
c_optimization_mode=0 c_overflow_low=0 c_preload_latency=0 c_preload_regs=1
c_prim_fifo_type=512x72 c_prog_empty_thresh_assert_val=1 c_prog_empty_thresh_assert_val_axis=2 c_prog_empty_thresh_assert_val_rach=2
c_prog_empty_thresh_assert_val_rdch=2 c_prog_empty_thresh_assert_val_wach=2 c_prog_empty_thresh_assert_val_wdch=2 c_prog_empty_thresh_assert_val_wrch=2
c_prog_empty_thresh_negate_val=1 c_prog_empty_type=0 c_prog_empty_type_axis=5 c_prog_empty_type_rach=5
c_prog_empty_type_rdch=5 c_prog_empty_type_wach=5 c_prog_empty_type_wdch=5 c_prog_empty_type_wrch=5
c_prog_full_thresh_assert_val=8 c_prog_full_thresh_assert_val_axis=1023 c_prog_full_thresh_assert_val_rach=10 c_prog_full_thresh_assert_val_rdch=1023
c_prog_full_thresh_assert_val_wach=10 c_prog_full_thresh_assert_val_wdch=1023 c_prog_full_thresh_assert_val_wrch=10 c_prog_full_thresh_negate_val=5
c_prog_full_type=1 c_prog_full_type_axis=5 c_prog_full_type_rach=5 c_prog_full_type_rdch=5
c_prog_full_type_wach=5 c_prog_full_type_wdch=5 c_prog_full_type_wrch=5 c_rach_type=0
c_rd_data_count_width=1 c_rd_depth=16 c_rd_freq=100 c_rd_pntr_width=4
c_rdch_type=0 c_reg_slice_mode_axis=0 c_reg_slice_mode_rach=0 c_reg_slice_mode_rdch=0
c_reg_slice_mode_wach=0 c_reg_slice_mode_wdch=0 c_reg_slice_mode_wrch=0 c_synchronizer_stage=2
c_underflow_low=0 c_use_common_overflow=0 c_use_common_underflow=0 c_use_default_settings=0
c_use_dout_rst=0 c_use_ecc=0 c_use_ecc_axis=0 c_use_ecc_rach=0
c_use_ecc_rdch=0 c_use_ecc_wach=0 c_use_ecc_wdch=0 c_use_ecc_wrch=0
c_use_embedded_reg=0 c_use_fifo16_flags=0 c_use_fwft_data_count=0 c_valid_low=0
c_wach_type=0 c_wdch_type=0 c_wr_ack_low=0 c_wr_data_count_width=1
c_wr_depth=16 c_wr_depth_axis=1024 c_wr_depth_rach=16 c_wr_depth_rdch=1024
c_wr_depth_wach=16 c_wr_depth_wdch=1024 c_wr_depth_wrch=16 c_wr_freq=100
c_wr_pntr_width=4 c_wr_pntr_width_axis=10 c_wr_pntr_width_rach=4 c_wr_pntr_width_rdch=10
c_wr_pntr_width_wach=4 c_wr_pntr_width_wdch=10 c_wr_pntr_width_wrch=4 c_wr_response_latency=0
c_wrch_type=0
Core Type=fifo_generator_v9_1
c_add_ngc_constraint=0 c_application_type_axis=0 c_application_type_rach=0 c_application_type_rdch=0
c_application_type_wach=0 c_application_type_wdch=0 c_application_type_wrch=0 c_axi_addr_width=32
c_axi_aruser_width=1 c_axi_awuser_width=1 c_axi_buser_width=1 c_axi_data_width=64
c_axi_id_width=4 c_axi_ruser_width=1 c_axi_type=0 c_axi_wuser_width=1
c_axis_tdata_width=64 c_axis_tdest_width=4 c_axis_tid_width=8 c_axis_tkeep_width=4
c_axis_tstrb_width=4 c_axis_tuser_width=4 c_axis_type=0 c_common_clock=1
c_count_type=0 c_data_count_width=1 c_default_value=0 c_din_width=33
c_din_width_axis=1 c_din_width_rach=32 c_din_width_rdch=64 c_din_width_wach=32
c_din_width_wdch=64 c_din_width_wrch=2 c_dout_rst_val=0 c_dout_width=33
c_enable_rlocs=0 c_enable_rst_sync=1 c_error_injection_type=0 c_error_injection_type_axis=0
c_error_injection_type_rach=0 c_error_injection_type_rdch=0 c_error_injection_type_wach=0 c_error_injection_type_wdch=0
c_error_injection_type_wrch=0 c_family=spartan6 c_full_flags_rst_val=1 c_has_almost_empty=0
c_has_almost_full=0 c_has_axi_aruser=0 c_has_axi_awuser=0 c_has_axi_buser=0
c_has_axi_rd_channel=0 c_has_axi_ruser=0 c_has_axi_wr_channel=0 c_has_axi_wuser=0
c_has_axis_tdata=0 c_has_axis_tdest=0 c_has_axis_tid=0 c_has_axis_tkeep=0
c_has_axis_tlast=0 c_has_axis_tready=0 c_has_axis_tstrb=0 c_has_axis_tuser=0
c_has_backup=0 c_has_data_count=0 c_has_data_counts_axis=0 c_has_data_counts_rach=0
c_has_data_counts_rdch=0 c_has_data_counts_wach=0 c_has_data_counts_wdch=0 c_has_data_counts_wrch=0
c_has_int_clk=0 c_has_master_ce=0 c_has_meminit_file=0 c_has_overflow=0
c_has_prog_flags_axis=0 c_has_prog_flags_rach=0 c_has_prog_flags_rdch=0 c_has_prog_flags_wach=0
c_has_prog_flags_wdch=0 c_has_prog_flags_wrch=0 c_has_rd_data_count=0 c_has_rd_rst=0
c_has_rst=1 c_has_slave_ce=0 c_has_srst=0 c_has_underflow=0
c_has_valid=0 c_has_wr_ack=0 c_has_wr_data_count=0 c_has_wr_rst=0
c_implementation_type=0 c_implementation_type_axis=1 c_implementation_type_rach=1 c_implementation_type_rdch=1
c_implementation_type_wach=1 c_implementation_type_wdch=1 c_implementation_type_wrch=1 c_init_wr_pntr_val=0
c_interface_type=0 c_memory_type=1 c_mif_file_name=0 c_msgon_val=0
c_optimization_mode=0 c_overflow_low=0 c_preload_latency=0 c_preload_regs=1
c_prim_fifo_type=512x72 c_prog_empty_thresh_assert_val=1 c_prog_empty_thresh_assert_val_axis=2 c_prog_empty_thresh_assert_val_rach=2
c_prog_empty_thresh_assert_val_rdch=2 c_prog_empty_thresh_assert_val_wach=2 c_prog_empty_thresh_assert_val_wdch=2 c_prog_empty_thresh_assert_val_wrch=2
c_prog_empty_thresh_negate_val=1 c_prog_empty_type=0 c_prog_empty_type_axis=5 c_prog_empty_type_rach=5
c_prog_empty_type_rdch=5 c_prog_empty_type_wach=5 c_prog_empty_type_wdch=5 c_prog_empty_type_wrch=5
c_prog_full_thresh_assert_val=504 c_prog_full_thresh_assert_val_axis=1023 c_prog_full_thresh_assert_val_rach=10 c_prog_full_thresh_assert_val_rdch=1023
c_prog_full_thresh_assert_val_wach=10 c_prog_full_thresh_assert_val_wdch=1023 c_prog_full_thresh_assert_val_wrch=10 c_prog_full_thresh_negate_val=5
c_prog_full_type=1 c_prog_full_type_axis=5 c_prog_full_type_rach=5 c_prog_full_type_rdch=5
c_prog_full_type_wach=5 c_prog_full_type_wdch=5 c_prog_full_type_wrch=5 c_rach_type=0
c_rd_data_count_width=1 c_rd_depth=512 c_rd_freq=100 c_rd_pntr_width=9
c_rdch_type=0 c_reg_slice_mode_axis=0 c_reg_slice_mode_rach=0 c_reg_slice_mode_rdch=0
c_reg_slice_mode_wach=0 c_reg_slice_mode_wdch=0 c_reg_slice_mode_wrch=0 c_synchronizer_stage=2
c_underflow_low=0 c_use_common_overflow=0 c_use_common_underflow=0 c_use_default_settings=0
c_use_dout_rst=0 c_use_ecc=0 c_use_ecc_axis=0 c_use_ecc_rach=0
c_use_ecc_rdch=0 c_use_ecc_wach=0 c_use_ecc_wdch=0 c_use_ecc_wrch=0
c_use_embedded_reg=0 c_use_fifo16_flags=0 c_use_fwft_data_count=0 c_valid_low=0
c_wach_type=0 c_wdch_type=0 c_wr_ack_low=0 c_wr_data_count_width=1
c_wr_depth=512 c_wr_depth_axis=1024 c_wr_depth_rach=16 c_wr_depth_rdch=1024
c_wr_depth_wach=16 c_wr_depth_wdch=1024 c_wr_depth_wrch=16 c_wr_freq=100
c_wr_pntr_width=9 c_wr_pntr_width_axis=10 c_wr_pntr_width_rach=4 c_wr_pntr_width_rdch=10
c_wr_pntr_width_wach=4 c_wr_pntr_width_wdch=10 c_wr_pntr_width_wrch=4 c_wr_response_latency=0
c_wrch_type=0
Core Type=fifo_generator_v9_1
c_add_ngc_constraint=0 c_application_type_axis=0 c_application_type_rach=0 c_application_type_rdch=0
c_application_type_wach=0 c_application_type_wdch=0 c_application_type_wrch=0 c_axi_addr_width=32
c_axi_aruser_width=1 c_axi_awuser_width=1 c_axi_buser_width=1 c_axi_data_width=64
c_axi_id_width=4 c_axi_ruser_width=1 c_axi_type=0 c_axi_wuser_width=1
c_axis_tdata_width=64 c_axis_tdest_width=4 c_axis_tid_width=8 c_axis_tkeep_width=4
c_axis_tstrb_width=4 c_axis_tuser_width=4 c_axis_type=0 c_common_clock=1
c_count_type=0 c_data_count_width=1 c_default_value=0 c_din_width=7
c_din_width_axis=1 c_din_width_rach=32 c_din_width_rdch=64 c_din_width_wach=32
c_din_width_wdch=64 c_din_width_wrch=2 c_dout_rst_val=0 c_dout_width=7
c_enable_rlocs=0 c_enable_rst_sync=1 c_error_injection_type=0 c_error_injection_type_axis=0
c_error_injection_type_rach=0 c_error_injection_type_rdch=0 c_error_injection_type_wach=0 c_error_injection_type_wdch=0
c_error_injection_type_wrch=0 c_family=spartan6 c_full_flags_rst_val=1 c_has_almost_empty=0
c_has_almost_full=0 c_has_axi_aruser=0 c_has_axi_awuser=0 c_has_axi_buser=0
c_has_axi_rd_channel=0 c_has_axi_ruser=0 c_has_axi_wr_channel=0 c_has_axi_wuser=0
c_has_axis_tdata=0 c_has_axis_tdest=0 c_has_axis_tid=0 c_has_axis_tkeep=0
c_has_axis_tlast=0 c_has_axis_tready=0 c_has_axis_tstrb=0 c_has_axis_tuser=0
c_has_backup=0 c_has_data_count=0 c_has_data_counts_axis=0 c_has_data_counts_rach=0
c_has_data_counts_rdch=0 c_has_data_counts_wach=0 c_has_data_counts_wdch=0 c_has_data_counts_wrch=0
c_has_int_clk=0 c_has_master_ce=0 c_has_meminit_file=0 c_has_overflow=0
c_has_prog_flags_axis=0 c_has_prog_flags_rach=0 c_has_prog_flags_rdch=0 c_has_prog_flags_wach=0
c_has_prog_flags_wdch=0 c_has_prog_flags_wrch=0 c_has_rd_data_count=0 c_has_rd_rst=0
c_has_rst=1 c_has_slave_ce=0 c_has_srst=0 c_has_underflow=0
c_has_valid=0 c_has_wr_ack=0 c_has_wr_data_count=0 c_has_wr_rst=0
c_implementation_type=0 c_implementation_type_axis=1 c_implementation_type_rach=1 c_implementation_type_rdch=1
c_implementation_type_wach=1 c_implementation_type_wdch=1 c_implementation_type_wrch=1 c_init_wr_pntr_val=0
c_interface_type=0 c_memory_type=2 c_mif_file_name=0 c_msgon_val=0
c_optimization_mode=0 c_overflow_low=0 c_preload_latency=0 c_preload_regs=1
c_prim_fifo_type=512x72 c_prog_empty_thresh_assert_val=1 c_prog_empty_thresh_assert_val_axis=2 c_prog_empty_thresh_assert_val_rach=2
c_prog_empty_thresh_assert_val_rdch=2 c_prog_empty_thresh_assert_val_wach=2 c_prog_empty_thresh_assert_val_wdch=2 c_prog_empty_thresh_assert_val_wrch=2
c_prog_empty_thresh_negate_val=1 c_prog_empty_type=0 c_prog_empty_type_axis=5 c_prog_empty_type_rach=5
c_prog_empty_type_rdch=5 c_prog_empty_type_wach=5 c_prog_empty_type_wdch=5 c_prog_empty_type_wrch=5
c_prog_full_thresh_assert_val=8 c_prog_full_thresh_assert_val_axis=1023 c_prog_full_thresh_assert_val_rach=10 c_prog_full_thresh_assert_val_rdch=1023
c_prog_full_thresh_assert_val_wach=10 c_prog_full_thresh_assert_val_wdch=1023 c_prog_full_thresh_assert_val_wrch=10 c_prog_full_thresh_negate_val=5
c_prog_full_type=1 c_prog_full_type_axis=5 c_prog_full_type_rach=5 c_prog_full_type_rdch=5
c_prog_full_type_wach=5 c_prog_full_type_wdch=5 c_prog_full_type_wrch=5 c_rach_type=0
c_rd_data_count_width=1 c_rd_depth=16 c_rd_freq=100 c_rd_pntr_width=4
c_rdch_type=0 c_reg_slice_mode_axis=0 c_reg_slice_mode_rach=0 c_reg_slice_mode_rdch=0
c_reg_slice_mode_wach=0 c_reg_slice_mode_wdch=0 c_reg_slice_mode_wrch=0 c_synchronizer_stage=2
c_underflow_low=0 c_use_common_overflow=0 c_use_common_underflow=0 c_use_default_settings=0
c_use_dout_rst=0 c_use_ecc=0 c_use_ecc_axis=0 c_use_ecc_rach=0
c_use_ecc_rdch=0 c_use_ecc_wach=0 c_use_ecc_wdch=0 c_use_ecc_wrch=0
c_use_embedded_reg=0 c_use_fifo16_flags=0 c_use_fwft_data_count=0 c_valid_low=0
c_wach_type=0 c_wdch_type=0 c_wr_ack_low=0 c_wr_data_count_width=1
c_wr_depth=16 c_wr_depth_axis=1024 c_wr_depth_rach=16 c_wr_depth_rdch=1024
c_wr_depth_wach=16 c_wr_depth_wdch=1024 c_wr_depth_wrch=16 c_wr_freq=100
c_wr_pntr_width=4 c_wr_pntr_width_axis=10 c_wr_pntr_width_rach=4 c_wr_pntr_width_rdch=10
c_wr_pntr_width_wach=4 c_wr_pntr_width_wdch=10 c_wr_pntr_width_wrch=4 c_wr_response_latency=0
c_wrch_type=0
Core Type=fifo_generator_v9_1
c_add_ngc_constraint=0 c_application_type_axis=0 c_application_type_rach=0 c_application_type_rdch=0
c_application_type_wach=0 c_application_type_wdch=0 c_application_type_wrch=0 c_axi_addr_width=32
c_axi_aruser_width=1 c_axi_awuser_width=1 c_axi_buser_width=1 c_axi_data_width=64
c_axi_id_width=4 c_axi_ruser_width=1 c_axi_type=0 c_axi_wuser_width=1
c_axis_tdata_width=64 c_axis_tdest_width=4 c_axis_tid_width=8 c_axis_tkeep_width=4
c_axis_tstrb_width=4 c_axis_tuser_width=4 c_axis_type=0 c_common_clock=1
c_count_type=0 c_data_count_width=1 c_default_value=0 c_din_width=15
c_din_width_axis=1 c_din_width_rach=32 c_din_width_rdch=64 c_din_width_wach=32
c_din_width_wdch=64 c_din_width_wrch=2 c_dout_rst_val=0 c_dout_width=15
c_enable_rlocs=0 c_enable_rst_sync=1 c_error_injection_type=0 c_error_injection_type_axis=0
c_error_injection_type_rach=0 c_error_injection_type_rdch=0 c_error_injection_type_wach=0 c_error_injection_type_wdch=0
c_error_injection_type_wrch=0 c_family=spartan6 c_full_flags_rst_val=1 c_has_almost_empty=0
c_has_almost_full=0 c_has_axi_aruser=0 c_has_axi_awuser=0 c_has_axi_buser=0
c_has_axi_rd_channel=0 c_has_axi_ruser=0 c_has_axi_wr_channel=0 c_has_axi_wuser=0
c_has_axis_tdata=0 c_has_axis_tdest=0 c_has_axis_tid=0 c_has_axis_tkeep=0
c_has_axis_tlast=0 c_has_axis_tready=0 c_has_axis_tstrb=0 c_has_axis_tuser=0
c_has_backup=0 c_has_data_count=0 c_has_data_counts_axis=0 c_has_data_counts_rach=0
c_has_data_counts_rdch=0 c_has_data_counts_wach=0 c_has_data_counts_wdch=0 c_has_data_counts_wrch=0
c_has_int_clk=0 c_has_master_ce=0 c_has_meminit_file=0 c_has_overflow=0
c_has_prog_flags_axis=0 c_has_prog_flags_rach=0 c_has_prog_flags_rdch=0 c_has_prog_flags_wach=0
c_has_prog_flags_wdch=0 c_has_prog_flags_wrch=0 c_has_rd_data_count=0 c_has_rd_rst=0
c_has_rst=1 c_has_slave_ce=0 c_has_srst=0 c_has_underflow=0
c_has_valid=0 c_has_wr_ack=0 c_has_wr_data_count=0 c_has_wr_rst=0
c_implementation_type=0 c_implementation_type_axis=1 c_implementation_type_rach=1 c_implementation_type_rdch=1
c_implementation_type_wach=1 c_implementation_type_wdch=1 c_implementation_type_wrch=1 c_init_wr_pntr_val=0
c_interface_type=0 c_memory_type=1 c_mif_file_name=0 c_msgon_val=0
c_optimization_mode=0 c_overflow_low=0 c_preload_latency=0 c_preload_regs=1
c_prim_fifo_type=512x72 c_prog_empty_thresh_assert_val=1 c_prog_empty_thresh_assert_val_axis=2 c_prog_empty_thresh_assert_val_rach=2
c_prog_empty_thresh_assert_val_rdch=2 c_prog_empty_thresh_assert_val_wach=2 c_prog_empty_thresh_assert_val_wdch=2 c_prog_empty_thresh_assert_val_wrch=2
c_prog_empty_thresh_negate_val=1 c_prog_empty_type=0 c_prog_empty_type_axis=5 c_prog_empty_type_rach=5
c_prog_empty_type_rdch=5 c_prog_empty_type_wach=5 c_prog_empty_type_wdch=5 c_prog_empty_type_wrch=5
c_prog_full_thresh_assert_val=490 c_prog_full_thresh_assert_val_axis=1023 c_prog_full_thresh_assert_val_rach=10 c_prog_full_thresh_assert_val_rdch=1023
c_prog_full_thresh_assert_val_wach=10 c_prog_full_thresh_assert_val_wdch=1023 c_prog_full_thresh_assert_val_wrch=10 c_prog_full_thresh_negate_val=5
c_prog_full_type=1 c_prog_full_type_axis=5 c_prog_full_type_rach=5 c_prog_full_type_rdch=5
c_prog_full_type_wach=5 c_prog_full_type_wdch=5 c_prog_full_type_wrch=5 c_rach_type=0
c_rd_data_count_width=1 c_rd_depth=512 c_rd_freq=100 c_rd_pntr_width=9
c_rdch_type=0 c_reg_slice_mode_axis=0 c_reg_slice_mode_rach=0 c_reg_slice_mode_rdch=0
c_reg_slice_mode_wach=0 c_reg_slice_mode_wdch=0 c_reg_slice_mode_wrch=0 c_synchronizer_stage=2
c_underflow_low=0 c_use_common_overflow=0 c_use_common_underflow=0 c_use_default_settings=0
c_use_dout_rst=0 c_use_ecc=0 c_use_ecc_axis=0 c_use_ecc_rach=0
c_use_ecc_rdch=0 c_use_ecc_wach=0 c_use_ecc_wdch=0 c_use_ecc_wrch=0
c_use_embedded_reg=0 c_use_fifo16_flags=0 c_use_fwft_data_count=0 c_valid_low=0
c_wach_type=0 c_wdch_type=0 c_wr_ack_low=0 c_wr_data_count_width=1
c_wr_depth=512 c_wr_depth_axis=1024 c_wr_depth_rach=16 c_wr_depth_rdch=1024
c_wr_depth_wach=16 c_wr_depth_wdch=1024 c_wr_depth_wrch=16 c_wr_freq=100
c_wr_pntr_width=9 c_wr_pntr_width_axis=10 c_wr_pntr_width_rach=4 c_wr_pntr_width_rdch=10
c_wr_pntr_width_wach=4 c_wr_pntr_width_wdch=10 c_wr_pntr_width_wrch=4 c_wr_response_latency=0
c_wrch_type=0
Core Type=fifo_generator_v9_1
c_add_ngc_constraint=0 c_application_type_axis=0 c_application_type_rach=0 c_application_type_rdch=0
c_application_type_wach=0 c_application_type_wdch=0 c_application_type_wrch=0 c_axi_addr_width=32
c_axi_aruser_width=1 c_axi_awuser_width=1 c_axi_buser_width=1 c_axi_data_width=64
c_axi_id_width=4 c_axi_ruser_width=1 c_axi_type=0 c_axi_wuser_width=1
c_axis_tdata_width=64 c_axis_tdest_width=4 c_axis_tid_width=8 c_axis_tkeep_width=4
c_axis_tstrb_width=4 c_axis_tuser_width=4 c_axis_type=0 c_common_clock=1
c_count_type=0 c_data_count_width=1 c_default_value=0 c_din_width=1
c_din_width_axis=1 c_din_width_rach=32 c_din_width_rdch=64 c_din_width_wach=32
c_din_width_wdch=64 c_din_width_wrch=2 c_dout_rst_val=0 c_dout_width=1
c_enable_rlocs=0 c_enable_rst_sync=1 c_error_injection_type=0 c_error_injection_type_axis=0
c_error_injection_type_rach=0 c_error_injection_type_rdch=0 c_error_injection_type_wach=0 c_error_injection_type_wdch=0
c_error_injection_type_wrch=0 c_family=spartan6 c_full_flags_rst_val=1 c_has_almost_empty=0
c_has_almost_full=0 c_has_axi_aruser=0 c_has_axi_awuser=0 c_has_axi_buser=0
c_has_axi_rd_channel=0 c_has_axi_ruser=0 c_has_axi_wr_channel=0 c_has_axi_wuser=0
c_has_axis_tdata=0 c_has_axis_tdest=0 c_has_axis_tid=0 c_has_axis_tkeep=0
c_has_axis_tlast=0 c_has_axis_tready=0 c_has_axis_tstrb=0 c_has_axis_tuser=0
c_has_backup=0 c_has_data_count=0 c_has_data_counts_axis=0 c_has_data_counts_rach=0
c_has_data_counts_rdch=0 c_has_data_counts_wach=0 c_has_data_counts_wdch=0 c_has_data_counts_wrch=0
c_has_int_clk=0 c_has_master_ce=0 c_has_meminit_file=0 c_has_overflow=0
c_has_prog_flags_axis=0 c_has_prog_flags_rach=0 c_has_prog_flags_rdch=0 c_has_prog_flags_wach=0
c_has_prog_flags_wdch=0 c_has_prog_flags_wrch=0 c_has_rd_data_count=0 c_has_rd_rst=0
c_has_rst=1 c_has_slave_ce=0 c_has_srst=0 c_has_underflow=0
c_has_valid=0 c_has_wr_ack=0 c_has_wr_data_count=0 c_has_wr_rst=0
c_implementation_type=0 c_implementation_type_axis=1 c_implementation_type_rach=1 c_implementation_type_rdch=1
c_implementation_type_wach=1 c_implementation_type_wdch=1 c_implementation_type_wrch=1 c_init_wr_pntr_val=0
c_interface_type=0 c_memory_type=2 c_mif_file_name=0 c_msgon_val=0
c_optimization_mode=0 c_overflow_low=0 c_preload_latency=0 c_preload_regs=1
c_prim_fifo_type=512x72 c_prog_empty_thresh_assert_val=1 c_prog_empty_thresh_assert_val_axis=2 c_prog_empty_thresh_assert_val_rach=2
c_prog_empty_thresh_assert_val_rdch=2 c_prog_empty_thresh_assert_val_wach=2 c_prog_empty_thresh_assert_val_wdch=2 c_prog_empty_thresh_assert_val_wrch=2
c_prog_empty_thresh_negate_val=1 c_prog_empty_type=0 c_prog_empty_type_axis=5 c_prog_empty_type_rach=5
c_prog_empty_type_rdch=5 c_prog_empty_type_wach=5 c_prog_empty_type_wdch=5 c_prog_empty_type_wrch=5
c_prog_full_thresh_assert_val=56 c_prog_full_thresh_assert_val_axis=1023 c_prog_full_thresh_assert_val_rach=10 c_prog_full_thresh_assert_val_rdch=1023
c_prog_full_thresh_assert_val_wach=10 c_prog_full_thresh_assert_val_wdch=1023 c_prog_full_thresh_assert_val_wrch=10 c_prog_full_thresh_negate_val=5
c_prog_full_type=1 c_prog_full_type_axis=5 c_prog_full_type_rach=5 c_prog_full_type_rdch=5
c_prog_full_type_wach=5 c_prog_full_type_wdch=5 c_prog_full_type_wrch=5 c_rach_type=0
c_rd_data_count_width=1 c_rd_depth=64 c_rd_freq=100 c_rd_pntr_width=6
c_rdch_type=0 c_reg_slice_mode_axis=0 c_reg_slice_mode_rach=0 c_reg_slice_mode_rdch=0
c_reg_slice_mode_wach=0 c_reg_slice_mode_wdch=0 c_reg_slice_mode_wrch=0 c_synchronizer_stage=2
c_underflow_low=0 c_use_common_overflow=0 c_use_common_underflow=0 c_use_default_settings=0
c_use_dout_rst=0 c_use_ecc=0 c_use_ecc_axis=0 c_use_ecc_rach=0
c_use_ecc_rdch=0 c_use_ecc_wach=0 c_use_ecc_wdch=0 c_use_ecc_wrch=0
c_use_embedded_reg=0 c_use_fifo16_flags=0 c_use_fwft_data_count=0 c_valid_low=0
c_wach_type=0 c_wdch_type=0 c_wr_ack_low=0 c_wr_data_count_width=1
c_wr_depth=64 c_wr_depth_axis=1024 c_wr_depth_rach=16 c_wr_depth_rdch=1024
c_wr_depth_wach=16 c_wr_depth_wdch=1024 c_wr_depth_wrch=16 c_wr_freq=100
c_wr_pntr_width=6 c_wr_pntr_width_axis=10 c_wr_pntr_width_rach=4 c_wr_pntr_width_rdch=10
c_wr_pntr_width_wach=4 c_wr_pntr_width_wdch=10 c_wr_pntr_width_wrch=4 c_wr_response_latency=0
c_wrch_type=0
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_DSP48A1=18 NGDBUILD_NUM_FD=60 NGDBUILD_NUM_FDC=70
NGDBUILD_NUM_FDCE=136 NGDBUILD_NUM_FDE=654 NGDBUILD_NUM_FDP=99 NGDBUILD_NUM_FDPE=4
NGDBUILD_NUM_FDR=405 NGDBUILD_NUM_FDRE=74 NGDBUILD_NUM_FDS=4 NGDBUILD_NUM_GND=30
NGDBUILD_NUM_IBUF=1 NGDBUILD_NUM_INV=33 NGDBUILD_NUM_LD=1 NGDBUILD_NUM_LUT1=81
NGDBUILD_NUM_LUT2=164 NGDBUILD_NUM_LUT3=145 NGDBUILD_NUM_LUT4=223 NGDBUILD_NUM_LUT5=313
NGDBUILD_NUM_LUT6=215 NGDBUILD_NUM_MUXCY=189 NGDBUILD_NUM_MUXF7=3 NGDBUILD_NUM_OBUF=25
NGDBUILD_NUM_RAM16X1D=44 NGDBUILD_NUM_RAM32M=49 NGDBUILD_NUM_RAM64X1D=1 NGDBUILD_NUM_RAMB16BWER=1
NGDBUILD_NUM_RAMB8BWER=3 NGDBUILD_NUM_SRLC16E=5 NGDBUILD_NUM_VCC=21 NGDBUILD_NUM_XORCY=128
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_DSP48A1=18 NGDBUILD_NUM_FD=60 NGDBUILD_NUM_FDC=70
NGDBUILD_NUM_FDCE=136 NGDBUILD_NUM_FDE=654 NGDBUILD_NUM_FDP=99 NGDBUILD_NUM_FDPE=4
NGDBUILD_NUM_FDR=405 NGDBUILD_NUM_FDRE=74 NGDBUILD_NUM_FDS=4 NGDBUILD_NUM_GND=30
NGDBUILD_NUM_IBUF=1 NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=33 NGDBUILD_NUM_LD=1
NGDBUILD_NUM_LUT1=81 NGDBUILD_NUM_LUT2=164 NGDBUILD_NUM_LUT3=145 NGDBUILD_NUM_LUT4=223
NGDBUILD_NUM_LUT5=313 NGDBUILD_NUM_LUT6=215 NGDBUILD_NUM_MUXCY=189 NGDBUILD_NUM_MUXF7=3
NGDBUILD_NUM_OBUF=25 NGDBUILD_NUM_RAM32M=49 NGDBUILD_NUM_RAMB16BWER=1 NGDBUILD_NUM_RAMB8BWER=3
NGDBUILD_NUM_SRLC16E=5 NGDBUILD_NUM_VCC=21 NGDBUILD_NUM_XORCY=128
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx45-2-fgg484
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -sd=<No customer specific name> -write_timing_constraints=NO
-cross_clock_analysis=NO -bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100
-dsp_utilization_ratio=100 -reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto
-safe_implementation=No -fsm_style=LUT -ram_extract=Yes -ram_style=Auto
-rom_extract=Yes -shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO
-resource_sharing=YES -async_to_sync=NO -use_dsp48=Auto -iobuf=YES
-max_fanout=100000 -bufg=16 -register_duplication=YES -register_balancing=No
-optimize_primitives=NO -use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto
-iob=Auto -equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5
 
ISim Statistics
Xilinx HDL Libraries Used=ieee, std
Fuse Resource Usage=1497 ms, 40840 KB