. How this FAQ began. . . Helmut, . I do not wish to burden you, but it has occurred to me that it might . be a good idea to add a FAQ to the LTspice newsgroup. I have listed . some candidate questions and answers below. Of course, should you . decide to do this, you can select the questions and answers as you chose. . Rick Sawrey . . Thanks for this idea. . I will collect the most frequently asked questions in this file. . Helmut Q: How do I turn off the delivery of the group's messges? A: https://groups.yahoo.com/neo/groups/LTspice/info Please click on "Membership" on the top right hand side of the LTspice web page. Subscription -> Edit Settings No Email Q: Is there an official tutorial? A: SwitcherCAD III/LTspice Getting Started Guide http://www.linear.com/designtools/software/LTspiceGettingStartedGuide.pdf SwitcherCAD III/LTspice Users Guide http://ltspice.linear.com/software/scad3.pdf Please also visit our Links section for more tutorials. Links > LTspice and SPICE Courseware And Tutorials Q: Is it ok to ask dumb questions? A: Generally yes; however you should take a little time to find the answers to basic questions, before you ask. You should consult the LTspice help file, search the messages, or look at the Links section of the group for information. Q: Is it OK to ask really dumb questions? A: Questions like "What is Spice?" and "What types of analyses can LTspice do?" are discouraged, because it is very easy to get these answered on your own. See the previous answer. Q: Is this group a good place to learn how to use Spice? A: No: however, the resources listed above will be helpful. If you use these sources, be aware that different versions of Spice are somewhat different. Most of the basic features, like analysis types and component types are similar, but schematic capture and plotting are different. If you are serious about Spice, you might want to buy a basic book for reference. Q: Is it OK to ask for help on homework problems? A: That's up to you, but if your question seems to be a very specific homework question, many group members will not respond. Q: For what are these different file types? A: Schematic: name.asc the drawing with your circuit Symbol: name.asy symbols for the schematic Logfile: name.log infos and results from .four, .measure, .op Netlist: name.net you don't care about Result: name.raw usually a binary file Result: name.fft result of an FFT, usually a binary file Plot settings: name.plt Model file: abc.xyz contains the models, any file name Symbol: name.cir if you have a netlist input file Q: How can I add intrinsic device models (BJTs, FETs, etc.) to LTspice? A: Please take a look to the many examples in the section "Files > Lib". Q: How can I add subcircuits to LTspice? A: You WILL find many answers when you search the messages for words like library, symbol or FAQ. Please read first the programs help: Help ->Schematic Capture -> Editing Components -> Creating New Symbols Help -> Help Topics ->FAQs -> Third party models Help -> Help Topics ->FAQs -> Mosfet You will find also help in the linked documents from our LTspice Yahoo group. Links Links > Spice Courseware And Tutorials There is another document about symbols and models in our Files section. Files > Tut > Symbol Types For Subcircuits Q: How do you copy and paste between schematics? A: Click on "Copy" in the tool bar. Select what you want to copy. Make the other schematic active and then click on "paste" in the tool bar." Q: How do I copy and paste between symbols in the symbol editor? A: It is not possible to use copy and paste in the symbol editor. Symbol files are ASCII-text. Merge the text as described in message 7201. Q: I have a pulse source in my schematic with zero transition times. LTspice only shows slow transition times of 2ns. PULSE(0 5 0 0 0 20n 100n) What's going on? A: Ltspice automatically will use a default value for and if these parameters are set to zero. Default value: 10% of Ton or 10% of Tperiod-Ton whatever is smaller. You have to specify Trise and Tfall if you want a certain value. PULSE(0 5 0 100p 100p 20n 100n) Don't use steeper transitions as required by your application. Q: I have used a pure sine source in my schematic, but the output signal of my circuit looks slightly different from cycle to cycle. A: LTspice has waveform compression enabled as the default setting. This compression reduces the amount of saved data during the simulation. It's a lossy compression and thus it can distort the saved signals. You can switch it off with the following command line in your schematic. .options plotwinsize=0 It could be switched off in the "Control Panel -> compression" pane as well, but this setting will be lost after a new invocation of LTspice. Q: The newer versions of LTspice never have the circuit synthesizer in the menu "File -> Switch Selector Guide". Where is it now? A: This circuit synthesizer has been removed because it's not updated since a long time. LTC is working on a alternative solution. In the mean time you can use the older version 2.19k in parallel with your actual version. Just download the files "scad3_2.19k.*" from the Yahoo-group "LTspiceFiles" and move those files to the directory "C:\programs\LTC\SWCadiii" where your "scad3.exe" has been installed. Q: The newer versions of LTspice never have the circuit synthesizer in the menu "File -> Switch Selector Guide". Where is it now? A: This circuit synthesizer has been removed because it's not updated since a long time. LTC is working on a alternative solution. In the Q: I have a design with three hierarchical levels of subcircuits. Why don't propagate my parameters to the lowest level subcircuit? A: Parameters can only propagate two file levels deep. This means you should accordingly organize your file structure. Your subcircuit structure has no limits how many level it has but the hierarchy of the files (file levels) used with ".lib" or ".include" is limited to two. (More details are in the thread starting at message 14073.) Q: Stepping parameters: How do I know which step belongs to which trace A: Set a cursor to this graph. Move the mouse cursor near the "cross hair". The cursor icon will change to 1 or 2. Now do a right-button mouse-click. A dialog will be shown telling you the step number and value. Q: Stepping parameters: How can I select or display a specific step A: You have two chances to display only a few of the sims. 1. From the menu: Plot settings -> Select Steps 2. You could plot with the @ selector to get only the waveform from the selected simulation runs. V(out)@1 and V(out)@2 Q: Stepping parameters: How can I set the cursors to fifferent steps. A: Enable both cursors for a waveform. If you move the mouse pointer over the cross-hair of the waveform cursor, a 1 or 2 will be displayed. Now use the arrow keys to jump from simulation run to simulation run. Each of the two waveform cursors can be independently set to the simulation run you want. Q: I have a subcircuit model of a P-Mosfet. Can I use it with the normal "pmos" symbol? A: Yes, because most supplier use the same pin-order D, G, S. The procedure below can be used for any type of devices like diodes, BJT, Mosfets, inductors, ... 1. Add a "pmos" device to the schematic. 2. Replace the value PMOS with IRF7404 on your pmos-transistor in the schematic. 3. Ctrl-right-mouse-click on the transistor in your schematic. A dialog window with all the attributes will be shown. 4. Replace the value MP with X. This X tells LTspice that this symbol is for a subciruit. OK 5. Add the SPICE-directive into your schematic .include irf7404.spi 6. I recommend to keep the model file in the same folder as the schematic. This makes a complete backup of a circuit easier than having this file in the installation lib\sub folder. Hint, this file may contain many models. Q: The results of an FFT are not as from my text book. A: 1. Try to have an integral number of signal periods in the simulation, e. g. 20 periods, but not 20.3 periods. 2. Use a small maximum timestep of 1/100 to 1/1000 of the signal's period time. .tran 0 10m 0 100n Add the following comamnd to switch off data compression. .options plotwinsize=0 Q: LTspice reports two THD values in the .FOUR analysis, e. g. Total Harmonic Distortion: 12.12345%(13.3456%) A: The first value is for the sum of the requested harmonics only. The value in parentheses is the total THD of ALL harmonics. Q: I got a schematic but without the models of the transistors. LTspice ask to replace the missing models with the default type. What does this mean? A: When you click on OK, LTspice will replace bipolar transistors with the default NPN regardless it was a PNP type transistor. The same applies to NMOS transistors. Your PMOS will become an NMOS. Don't click OK. Instead abort the the simulation and add a SPICE-directive to your schematic as shown in the example below. .model BD139 NPN .model BD140 PNP LTspice will then use the default NPN and PNP model. The default transistors have a B=100. See the help pages of LTspice. Q: "Timestep too small" error message A: If the LTspice program can't find a solution for the guessed time step, then the program decreases the time step and tries again. This can't work forever. If the timestep reaches a certain limit (1fs?) then LTspice stops and prints this error message. The "Alternate" solver can calculate with more accuracy and so it can decrease the timestep to a lower level. But even this can fail. It's difficult to give a general help. I would try with the following. 1. Set a useful maximum time step in the ".tran" line. Try with some values. Use/keep a maximum timestep regardless whether it still fails. Most of the following settings are in the Control Panel. Control Panel -> SPICE If still not OK: 2. Try wth the Alternate solver If still not OK: 3. Back to Normal solver Try with method: Gear If still not OK: 4. Back to default settings. Try with "startup" in the .TRAN setting . If still not OK: 5. Back to default settings. Try with Gmin, but not lower than 1e-10 If still not OK: 6. Back to default settings. Try with abstol, but not lower than 1e-10 Still not OK: 7. Back to default settings. Try with Reltol=0.005 Still not OK: 8. Back to default settings. Try with a combination of 5, 6 and/or 7 Example: .options gmin=1e-10 abstol=1e-10 reltol=0.003 Still not OK: 9. Back to default settings. Try with .options Tseed=maxtimestep/10 Still not OK: 10. Have the components real values? Add a series resistor in the capacitor(ESR) or inductor. Still not OK: 11. Try with .ic and .nodeset Still not OK: 12 Try with .options ".options cshunt=1e-15". Be very careful with this option. It may disturb your circuit. (.options gshunt=1e-12) Still not OK: 13: If it hangs in pseudo-tran, try ".options ptrantau=1e-6" Still not OK: 14: Add 1pF at some nodes. Still not OK: 15: Try ".options cshunt=1e-15" Still not OK: 16. Let try other people. :) Here is one of my largest settings I used in one case. Reset the SPICE settings: Control Panel -> SPICE Set the special GMIN option in the Control Panel as shown below. Control Panel -> Hacks Add GMIN across current sources Set a maximum time step. .tran 0 10m 0 1u startup .options gmin=1e-10 .options abstol=1e-10 .options reltol=0.003 .options method=gear .options cshunt=1e-15 .options gshunt=1e-10 -------------------------------------------------------------------- --- Tips from "analog" Here are my "driving tips" for LTspice: Because of the differing strategies used to handle them, convergence issues are best sorted into those relating to finding the initial dc operating point and those occurring during a transient run. At the dc operating point and with ideal elements, inductors become shorts and capacitors become opens, whereas just the opposite occurs with step-size compression during transient troubles. In one case, delta time goes to infinity, whereas in the other, it approaches zero. For transient convergence, spice depends on the fact that realistically modeled nonlinear elements should approach finite, linear, time invariant impedances as step size gets really small. LTspice has improved models for inductors and capacitors that allow realistic parasitics to be entered and computed as an integral part of the element. This prevents the corresponding branch admittances from going to zero or infinity for reduced time steps during a transient analysis, greatly improving run time convergence. Also, as I understand it, inductances (and voltage source) with series resistance are more computationally efficient, because they can then be directly "plugged" into the admittance matrix. Another benefit of specifying realistic parasitic resistances is that it avoids situations where unrealistic high frequency oscillations drive the time step to a crawl (not really a convergence issue). Bearing this in mind, LTspice transient convergence "fixes"/ (standard good practice) in order of "goodness", im my opinion, are: 1) Specify series and parallel resistance parameters for capacitors and inductors. 2) Use the current source version of elements whenever possible. Note that specifying a series resistance for voltage sources actually changes them into current sources internally. For example, rather than behavioral voltage sources, use current sources in parallel with a small capacitor (1nF or less) edited to have a 1 ohm shunt resistance. 3) Make sure that all semiconductor junctions (and other nonlinear elements) are modeled with realistic series resistances and junction capacitances as well. The importance and effect of something seemingly so mundane as this cannot be overemphasized, for this is what forces linear behavior during time step compression. 4) Use LTspice's built-in alternate solver for three plus decades more numerical dynamic range (at a 2x speed penalty). 5) Use the Gear integration method to numerically dampen out "noise" that should better be taken care of by step 1). 6) Add .options Tseed=/10 (thanks Helmut) 7) Increase "reltol" above the default .001 (going higher than about .03 may be counter productive). Solving Operating Point Convergence Problems In addition to most of the steps above: Examine your simulation circuit for behavioral sources or other devices that may go highly nonlinear as the sources are stepped up from zero. Splitting a very nonlinear element into several pieces across several nodes can sometimes dilute the problem behavior to the point where the solver no longer gets hung up on one very bad element. In such cases, adding more nodes can actually make the simulation run much faster. If not already available somewhere in the circuit, a unity node may be created by setting up an isolated dc voltage source equal to one volt. Clearly, any expression may be multiplied by the voltage on this node as many times as needed without changing the value of the expression during an analysis. The only effect on such an expres- sion occurs during source stepping while seeking the operating point. Then, as this unity node is reduced to near zero, anything multiplied by it is also forced to approach zero. Bear in mind that unity node multiplication can be sprinkled throughout a simulation wherever you suspect misbehavior. Differencing circuits with a lot of dc and gain are always good candidates as are abrupt limiters and behavioral expressions with node voltages in their denominators such that when the sources go to zero, the expressions blow up (something gone small / something gone to zero => infinity). These types of expressions can be multiplied by the unity node raised to whatever power required to make them behave. --- Q: My .AC simulation lasts forever. What's going on? A: SPICE tries to find the DC-operaing point at the beginning. This is a critical task for any SPICE and sometimes SPICE doesn't find a solution. The first thing to try is the "Alternate solver". Control Panel -> SPICE -> Solver Alternate Another option has helped in some cases which increases the number of iterations. Add the following SPICE-line to your schematic. .options itl1=500 itl2=500 You can also try to set some nodes to values you already know. .ic V(abc)=5 V(out)02 .... An extended version of this method is using a loadbias command. .loadbias myop.bias This file can be generated in a transient simulation. .savebias myop.bias