Version 4
SHEET 1 2096 1652
WIRE 48 0 0 0
WIRE 176 0 128 0
WIRE 384 0 176 0
WIRE 528 0 464 0
WIRE 768 16 640 16
WIRE -144 32 -272 32
WIRE 176 32 176 0
WIRE 704 80 704 64
WIRE -208 96 -208 80
WIRE 640 96 640 16
WIRE 672 96 640 96
WIRE -272 112 -272 32
WIRE -240 112 -272 112
WIRE 768 112 768 16
WIRE 768 112 736 112
WIRE 800 112 768 112
WIRE -144 128 -144 32
WIRE -144 128 -176 128
WIRE -112 128 -144 128
WIRE 0 128 0 0
WIRE 0 128 -32 128
WIRE 48 128 0 128
WIRE 288 128 112 128
WIRE 384 128 288 128
WIRE 528 128 528 0
WIRE 528 128 448 128
WIRE 672 128 528 128
WIRE -304 144 -432 144
WIRE -240 144 -304 144
WIRE 528 160 528 128
WIRE 704 160 704 144
WIRE -432 176 -432 144
WIRE -304 176 -304 144
WIRE -208 176 -208 160
WIRE 288 176 288 128
WIRE 768 256 768 112
WIRE 528 272 528 240
WIRE -432 288 -432 256
WIRE -304 288 -304 256
WIRE 368 320 368 304
WIRE 432 336 400 336
WIRE 176 352 176 96
WIRE 288 352 288 256
WIRE 288 352 176 352
WIRE 336 352 288 352
WIRE 768 368 768 336
WIRE 768 368 400 368
WIRE -304 400 -304 368
WIRE -160 400 -160 368
WIRE 368 400 368 384
WIRE 768 400 768 368
WIRE 288 432 288 352
WIRE 432 432 432 336
WIRE 432 432 288 432
WIRE -304 512 -304 480
WIRE -160 512 -160 480
WIRE 768 512 768 480
FLAG -304 288 0
FLAG -432 288 0
FLAG -208 80 +V
FLAG -208 176 -V
FLAG 704 64 +V
FLAG 704 160 -V
FLAG 368 304 +V
FLAG 368 400 -V
FLAG 528 272 0
FLAG -304 512 0
FLAG -160 512 0
FLAG -304 368 +V
FLAG -160 368 -V
FLAG 800 112 out
FLAG -432 144 in
FLAG 768 512 0
SYMBOL Opamps\\UniversalOpamp2 -208 128 R0
SYMATTR InstName U1
SYMATTR SpiceModel level.3a
SYMBOL Opamps\\UniversalOpamp2 704 112 R0
SYMATTR InstName U2
SYMATTR SpiceModel level.3a
SYMBOL Opamps\\UniversalOpamp2 368 352 M0
SYMATTR InstName U3
SYMATTR SpiceModel level.3a
SYMBOL Misc\\EuropeanResistor -128 144 R270
WINDOW 0 27 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 470
SYMBOL Misc\\EuropeanResistor 32 16 R270
WINDOW 0 27 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL Misc\\EuropeanResistor 368 16 R270
WINDOW 0 27 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value {R3}
SYMBOL Misc\\EuropeanResistor 272 160 R0
SYMATTR InstName R4
SYMATTR Value {R4}
SYMBOL Misc\\EuropeanResistor 512 144 R0
SYMATTR InstName R5
SYMATTR Value 1G
SYMBOL cap 160 32 R0
SYMATTR InstName C1
SYMATTR Value {C1}
SYMBOL cap 112 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {C2}
SYMBOL cap 448 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value {C3}
SYMBOL Misc\\EuropeanResistor -320 160 R0
SYMATTR InstName R6
SYMATTR Value 1Meg
SYMBOL voltage -432 160 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL voltage -304 384 R0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage -160 384 R0
SYMATTR InstName V3
SYMATTR Value -15
SYMBOL Misc\\EuropeanResistor 752 240 R0
SYMATTR InstName R7
SYMATTR Value 2k
SYMBOL Misc\\EuropeanResistor 752 384 R0
SYMATTR InstName R8
SYMATTR Value 8k
TEXT -440 -208 Left 2 !.ac lin 51000 100 5100
TEXT -496 1160 Left 2 ;;Random Worst case distribution: -1,0,1\n;simulates only combination of maximum and minimum tolerances \n;MAY (or may not) find worst case in reasonable number of runs\n*\n.step param run 0 200 1\n*.step param tolc list 0.1 1 2 5\n*\n.param tolr=0.1/100\n.param tolc=0.1/100\n*\n.param R2=wc(16k,tolr)\n.param R3=wc(16k,tolr)\n.param R4=wc(8k,tolr)\n*\n.param C1=wc(20n,tolc)\n.param C2=wc(10n,tolc)\n.param C3=wc(10n,tolc)\n.function wc(nom,tol) if(run==0, nom, if(flat(1)>0,nom*(1+tol),nom*(1-tol)))
TEXT 72 -56 Left 2 ;16k
TEXT 408 -56 Left 2 ;16k
TEXT 232 216 Left 2 ;8k
TEXT 48 192 Left 2 ;10n
TEXT 392 184 Left 2 ;10n
TEXT 64 64 Left 2 ;20n
TEXT -72 -208 Left 2 !.save V(in) V(out)
TEXT -72 -168 Left 2 !.meas notch MIN mag(V(out))
TEXT -496 584 Left 2 !*Binary Worst case distribution: -1,0,1\n*Simulates only combination of maximum and minimum tolerances \n* Requires run from 0 to 2^n, here 0 to 64\n*\n.step param run 0 64 1\n*.step param tolc list 0.1 1 2 5\n*\n.param tolr=0.1/100\n.param tolc=1/100\n*\n.param R2=wcb(1,run,16k,tolr)\n.param R3=wcb(2,run,16k,tolr)\n.param R4=wcb(3,run,8k,tolr)\n*\n.param C1=wcb(4,run,20n,tolc)\n.param C2=wcb(5,run,10n,tolc)\n.param C3=wcb(6,run,10n,tolc)\n.func wcb(n, run, nom, tol)  {if((run==0),nom,nom*(1-tol+2*tol*if(((run-1)-(2**n)*int((run-1)/2**n+1e-6))>(2**(n-1)-0.5),1,0)))}
TEXT 464 712 Left 2 ;Gain Notch\n70%  -41dB\n80%  -37.5dB\n90%  -31.5dB\n95%  -25dB\n100%  -0.27dB (-11dB R5=1Meg)
TEXT 544 248 Left 2 ;n. l.
TEXT -32 800 Left 2 ;Tolerance
TEXT 336 -216 Left 2 ;Run the simulation\nView->Spice Error Log\nCTRL right mouse click -> Plot stepped .meas data\n20*log10(notch)
LINE Normal 528 688 672 432
LINE Normal 576 656 528 688
LINE Normal 528 640 528 688
LINE Normal -208 800 -48 800
LINE Normal -176 816 -208 800
LINE Normal -176 784 -208 800
CIRCLE Normal 864 496 688 224 2