Go to the documentation of this file. 6 #define output_mode_medium_speed 0x1 7 #define output_mode_low_speed 0x2 8 #define output_mode_high_speed 0x3 12 #define GPIO_PP_output 0x0 13 #define GPIO_open_drain_output 0x4 14 #define AFIO_PP_output 0x8 15 #define AFIO_open_drain_output 0xC 17 #define analog_input 0x0 18 #define floating_input 0x4 19 #define input_without_pull_resistors 0x4 20 #define reset_state 0x4 21 #define digital_input 0x8 41 #define pin_configure_low(reg, pin, type) do{reg &= (~(0xF << (pin << 2))); reg |= (type << (pin << 2));}while(0) 42 #define pin_configure_high(reg, pin, type) do{reg &= (~(0xF << ((pin - 8) << 2))); reg |= (type << ((pin - 8) << 2));}while(0) 46 #define setup_GPIOA(pin_no, io_type) do{if((pin_no >= 0) && (pin_no < 8)){pin_configure_low(GPIOA_CRL, pin_no, io_type);}else{pin_configure_high(GPIOA_CRH, pin_no, io_type);}}while(0) 47 #define setup_GPIOB(pin_no, io_type) do{if((pin_no >= 0) && (pin_no < 8)){pin_configure_low(GPIOB_CRL, pin_no, io_type);}else{pin_configure_high(GPIOB_CRH, pin_no, io_type);}}while(0) 48 #define setup_GPIOC(pin_no, io_type) do{if((pin_no >= 0) && (pin_no < 8)){pin_configure_low(GPIOC_CRL, pin_no, io_type);}else{pin_configure_high(GPIOC_CRH, pin_no, io_type);}}while(0) 49 #define setup_GPIOD(pin_no, io_type) do{if((pin_no >= 0) && (pin_no < 8)){pin_configure_low(GPIOD_CRL, pin_no, io_type);}else{pin_configure_high(GPIOD_CRH, pin_no, io_type);}}while(0) 50 #define setup_GPIOE(pin_no, io_type) do{if((pin_no >= 0) && (pin_no < 8)){pin_configure_low(GPIOE_CRL, pin_no, io_type);}else{pin_configure_high(GPIOE_CRH, pin_no, io_type);}}while(0) 51 #define setup_GPIOF(pin_no, io_type) do{if((pin_no >= 0) && (pin_no < 8)){pin_configure_low(GPIOF_CRL, pin_no, io_type);}else{pin_configure_high(GPIOF_CRH, pin_no, io_type);}}while(0) 52 #define setup_GPIOG(pin_no, io_type) do{if((pin_no >= 0) && (pin_no < 8)){pin_configure_low(GPIOG_CRL, pin_no, io_type);}else{pin_configure_high(GPIOG_CRH, pin_no, io_type);}}while(0) 56 #define bit_set(reg, bit_val) reg |= (1 << bit_val) 57 #define bit_clr(reg, bit_val) reg &= (~(1 << bit_val)) 58 #define bit_tgl(reg, bit_val) reg ^= (1 << bit_val) 59 #define get_bit(reg, bit_val) (reg & (1 << bit_val)) 60 #define get_reg(reg, msk) (reg & msk) 64 #define GPIOA_pin_high(pin) bit_set(GPIOA_BSRR, pin) 65 #define GPIOB_pin_high(pin) bit_set(GPIOB_BSRR, pin) 66 #define GPIOC_pin_high(pin) bit_set(GPIOC_BSRR, pin) 67 #define GPIOD_pin_high(pin) bit_set(GPIOD_BSRR, pin) 68 #define GPIOE_pin_high(pin) bit_set(GPIOE_BSRR, pin) 69 #define GPIOF_pin_high(pin) bit_set(GPIOF_BSRR, pin) 70 #define GPIOG_pin_high(pin) bit_set(GPIOG_BSRR, pin) 72 #define GPIOA_pin_low(pin) bit_set(GPIOA_BRR, pin) 73 #define GPIOB_pin_low(pin) bit_set(GPIOB_BRR, pin) 74 #define GPIOC_pin_low(pin) bit_set(GPIOC_BRR, pin) 75 #define GPIOD_pin_low(pin) bit_set(GPIOD_BRR, pin) 76 #define GPIOE_pin_low(pin) bit_set(GPIOE_BRR, pin) 77 #define GPIOF_pin_low(pin) bit_set(GPIOF_BRR, pin) 78 #define GPIOG_pin_low(pin) bit_set(GPIOG_BRR, pin) 80 #define GPIOA_pin_toggle(pin) bit_tgl(GPIOA_ODR, pin) 81 #define GPIOB_pin_toggle(pin) bit_tgl(GPIOB_ODR, pin) 82 #define GPIOC_pin_toggle(pin) bit_tgl(GPIOC_ODR, pin) 83 #define GPIOD_pin_toggle(pin) bit_tgl(GPIOD_ODR, pin) 84 #define GPIOE_pin_toggle(pin) bit_tgl(GPIOE_ODR, pin) 85 #define GPIOF_pin_toggle(pin) bit_tgl(GPIOF_ODR, pin) 86 #define GPIOG_pin_toggle(pin) bit_tgl(GPIOG_ODR, pin) 88 #define get_GPIOA_pin_state(pin) get_bit(GPIOA_IDR, pin) 89 #define get_GPIOB_pin_state(pin) get_bit(GPIOB_IDR, pin) 90 #define get_GPIOC_pin_state(pin) get_bit(GPIOC_IDR, pin) 91 #define get_GPIOD_pin_state(pin) get_bit(GPIOD_IDR, pin) 92 #define get_GPIOE_pin_state(pin) get_bit(GPIOE_IDR, pin) 93 #define get_GPIOF_pin_state(pin) get_bit(GPIOF_IDR, pin) 94 #define get_GPIOG_pin_state(pin) get_bit(GPIOG_IDR, pin) 96 #define get_GPIOA_port(mask) get_reg(GPIOA_IDR, mask) 97 #define get_GPIOB_port(mask) get_reg(GPIOB_IDR, mask) 98 #define get_GPIOC_port(mask) get_reg(GPIOC_IDR, mask) 99 #define get_GPIOD_port(mask) get_reg(GPIOD_IDR, mask) 100 #define get_GPIOE_port(mask) get_reg(GPIOE_IDR, mask) 101 #define get_GPIOF_port(mask) get_reg(GPIOF_IDR, mask) 102 #define get_GPIOG_port(mask) get_reg(GPIOG_IDR, mask) 106 #define enable_pull_up_GPIOA(pin) bit_set(GPIOA_ODR, pin) 107 #define enable_pull_up_GPIOB(pin) bit_set(GPIOB_ODR, pin) 108 #define enable_pull_up_GPIOC(pin) bit_set(GPIOC_ODR, pin) 109 #define enable_pull_up_GPIOD(pin) bit_set(GPIOD_ODR, pin) 110 #define enable_pull_up_GPIOE(pin) bit_set(GPIOE_ODR, pin) 111 #define enable_pull_up_GPIOF(pin) bit_set(GPIOF_ODR, pin) 112 #define enable_pull_up_GPIOG(pin) bit_set(GPIOG_ODR, pin) 114 #define enable_pull_down_GPIOA(pin) bit_clr(GPIOA_ODR, pin) 115 #define enable_pull_down_GPIOB(pin) bit_clr(GPIOB_ODR, pin) 116 #define enable_pull_down_GPIOC(pin) bit_clr(GPIOC_ODR, pin) 117 #define enable_pull_down_GPIOD(pin) bit_clr(GPIOD_ODR, pin) 118 #define enable_pull_down_GPIOE(pin) bit_clr(GPIOE_ODR, pin) 119 #define enable_pull_down_GPIOF(pin) bit_clr(GPIOF_ODR, pin) 120 #define enable_pull_down_GPIOG(pin) bit_clr(GPIOG_ODR, pin) 124 #define enable_GPIOA(mode) RCC_APB2ENRbits.IOPAEN = mode 125 #define enable_GPIOB(mode) RCC_APB2ENRbits.IOPBEN = mode 126 #define enable_GPIOC(mode) RCC_APB2ENRbits.IOPCEN = mode 127 #define enable_GPIOD(mode) RCC_APB2ENRbits.IOPDEN = mode 128 #define enable_GPIOE(mode) RCC_APB2ENRbits.IOPEEN = mode 129 #define enable_GPIOF(mode) RCC_APB2ENRbits.IOPFEN = mode 130 #define enable_GPIOG(mode) RCC_APB2ENRbits.IOPGEN = mode