/*
 * Driver utilities for ATmega M1/C1 controllers, based on FreeRTOS.
 * Copyright (c) 2022 Sven Puga.
 */



#include <stdlib.h>
#include <stdbool.h>
#include <avr/io.h>
#include <avr/interrupt.h>

#include "FreeRTOS.h"
#include "task.h"
#include "semphr.h"

#include "../lib/buffers.h"
#include "../spi.h"



/***************************************************************************/

#define _SPI_MODE_DISABLED              0
#define _SPI_MODE_SLAVE                 1
#define _SPI_MODE_MASTER                2

static volatile uint8_t spiMode = _SPI_MODE_DISABLED;

static volatile SemaphoreHandle_t spiMutex = NULL;
static volatile StaticSemaphore_t spiMutexStatic;



#ifndef SPI_CONFIG_BUFFER_SIZE
#define SPI_CONFIG_BUFFER_SIZE          8
#endif

typedef struct spiData_t {
    spiTransaction_t *transaction;
    spiConfig_t config;
    TaskHandle_t taskHandle;
    uint32_t flags;
} spiData_t;

static volatile spiData_t _spiData[SPI_CONFIG_BUFFER_SIZE];
static volatile circularBuffer_t spiBuffer =
    CIRCULAR_BUFFER(_spiData, SPI_CONFIG_BUFFER_SIZE, spiData_t);

typedef struct spiActiveData_t {
    spiTransaction_t *transaction;
    uint8_t *out;
    uint8_t *in;
    size_t len;
    TaskHandle_t taskHandle;
    uint32_t flags;
} spiActiveData_t;

static spiActiveData_t spiActiveData;



#ifndef SPI_CONFIG_PORT_DELAY
#define SPI_CONFIG_PORT_DELAY           portMAX_DELAY
#endif



#define _SPI_DDR_MOSI           DDRB
#define _SPI_P_MOSI             PB1
#define _SPI_DDR_MISO           DDRB
#define _SPI_P_MISO             PB0
#define _SPI_DDR_SCK            DDRB
#define _SPI_P_SCK              PB7

#define _SPI_PIN_SS             PIND
#define _SPI_P_SS               PD3

#define _SPI_DDR_MOSI_A         DDRD
#define _SPI_P_MOSI_A           PD3
#define _SPI_DDR_MISO_A         DDRD
#define _SPI_P_MISO_A           PD2
#define _SPI_DDR_SCK_A          DDRD
#define _SPI_P_SCK_A            PD4

#define _SPI_PIN_SS_A           PINC
#define _SPI_P_SS_A             PC1



/***************************************************************************/

#define _SPI_SET_PINOUT(x)      do { \
                                    if (x == SPI_PINOUT_ALTERNATE) \
                                        MCUCR |= (1<<SPIPS); \
                                    else \
                                        MCUCR &= ~(1<<SPIPS); \
                                } while(0)

#define _SPI_IS_ENABLED()       ( SPCR & (1<<SPE) )

error_t spi_selectPinout(uint8_t pinout)
{
    if (_SPI_IS_ENABLED())
        return SPI_PINOUT_ERROR_ENABLED;
    _SPI_SET_PINOUT(pinout);
    return SPI_PINOUT_ERROR_SUCCESS;
}

#undef _SPI_SET_PINOUT
#undef _SPI_IS_ENABLED

#define _SPI_MUTEX_TAKE(m,s,e)    do { \
                                        taskENTER_CRITICAL(); \
                                        if (m == NULL) \
                                            m = xSemaphoreCreateMutexStatic((StaticSemaphore_t*)&s); \
                                        taskEXIT_CRITICAL(); \
                                        if (xSemaphoreTake(m, SPI_CONFIG_PORT_DELAY) != pdTRUE) \
                                            e = SPI_ERROR_MUTEX_TAKE_FAILED; \
                                    } while(0)

#define _SPI_MUTEX_GIVE(m,e)        do { \
                                        if (xSemaphoreGive(m) != pdTRUE) \
                                            e = SPI_ERROR_MUTEX_GIVE_FAILED; \
                                    } while(0)

#define _SPI_RESET_STATUS()         do { \
                                        SPSR |= (1<<SPIF) | (1<<WCOL); \
                                        (uint8_t)SPDR; \
                                    } while(0)

#define _SPI_IS_ALTERNATE_PINOUT()  ( MCUCR & (1<<SPIPS) )

#define _SPI_SETUP_MASTER_PINS()    do { \
                                        if (_SPI_IS_ALTERNATE_PINOUT()) { \
                                            _SPI_DDR_MOSI_A |= (1<<_SPI_P_MOSI_A); \
                                            _SPI_DDR_SCK_A |= (1<<_SPI_P_SCK_A); \
                                            } else { \
                                            _SPI_DDR_MOSI |= (1<<_SPI_P_MOSI); \
                                        _SPI_DDR_SCK |= (1<<_SPI_P_SCK); } \
                                    } while(0)

error_t spi_enableMaster()
{
    if (spiMode == _SPI_MODE_DISABLED)
    {
        while (circularBufferDrop((circularBuffer_t*)&spiBuffer) != NULL);
        _SPI_RESET_STATUS();
        _SPI_SETUP_MASTER_PINS();
        spiMode = _SPI_MODE_MASTER;
        return SPI_ENABLE_ERROR_SUCCESS;
    }
    else
        return SPI_ENABLE_ERROR_ACTIVE;
}

#undef _SPI_SETUP_MASTER_PINS

#define _SPI_SETUP_SLAVE_PINS()     do { \
                                        if (_SPI_IS_ALTERNATE_PINOUT()) { \
                                            _SPI_DDR_MISO_A |= (1<<_SPI_P_MISO_A); \
                                            } else { \
                                        _SPI_DDR_MISO |= (1<<_SPI_P_MISO); } \
                                    } while(0)

error_t spi_enableSlave()
{
    if (spiMode == _SPI_MODE_DISABLED)
    {
        while (circularBufferDrop((circularBuffer_t*)&spiBuffer) != NULL);
        _SPI_RESET_STATUS();
        _SPI_SETUP_SLAVE_PINS();
        spiMode = _SPI_MODE_SLAVE;
        return SPI_ENABLE_ERROR_SUCCESS;
    }
    else
        return SPI_ENABLE_ERROR_ACTIVE;
}

#undef _SPI_SETUP_SLAVE_PINS

#define _SPI_TURNOFF_SLAVE_PINS()   do { \
                                        if (_SPI_IS_ALTERNATE_PINOUT()) { \
                                            _SPI_DDR_MISO_A &= ~(1<<_SPI_P_MISO_A); \
                                        } else { \
                                            _SPI_DDR_MISO &= ~(1<<_SPI_P_MISO); } \
                                    } while(0)

#define _SPI_TURNOFF_MASTER_PINS()  do { \
                                        if (_SPI_IS_ALTERNATE_PINOUT()) { \
                                            _SPI_DDR_MOSI_A &= ~(1<<_SPI_P_MOSI_A); \
                                            _SPI_DDR_SCK_A &= ~(1<<_SPI_P_SCK_A); \
                                        } else { \
                                            _SPI_DDR_MOSI &= ~(1<<_SPI_P_MOSI); \
                                            _SPI_DDR_SCK &= ~(1<<_SPI_P_SCK); } \
                                    } while(0)

#define _SPI_DISABLE()              do { \
                                        SPCR = 0; \
                                    } while(0)

static void spi_stop();

void spi_disable()
{
    spi_stop();
    if (spiMode == _SPI_MODE_SLAVE)
        _SPI_TURNOFF_SLAVE_PINS();
    else if (spiMode == _SPI_MODE_MASTER)
        _SPI_TURNOFF_MASTER_PINS();
    _SPI_DISABLE();
    spiMode = _SPI_MODE_DISABLED;
}

#undef _SPI_TURNOFF_SLAVE_PINS
#undef _SPI_TURNOFF_MASTER_PINS
#undef _SPI_DISABLE

/*#define _SPI_SS_HIGH()      ( _SPI_IS_ALTERNATE_PINOUT() ? \
                                _SPI_PIN_SS_A & (1<<_SPI_PIN_SS_A) : \
                                _SPI_PIN_SS & (1<<_SPI_P_SS) )

#undef _SPI_SS_HIGH*/

#undef _SPI_IS_ALTERNATE_PINOUT



/***************************************************************************/

#define _SPI_SETUP(c,x)             do { \
                                        SPCR = (c & ((1<<DORD) | (1<<CPOL) | (1<<CPHA) | \
                                            (1<<SPR1) | (1<<SPR0))) | (x<<MSTR); \
                                        if (c & 0x80) \
                                            SPSR = (1<<SPI2X); \
                                        else \
                                            SPSR = (0<<SPI2X); \
                                    } while(0)

#define _SPI_ENABLE_AND_START(d)    do { \
                                        _SPI_RESET_STATUS(); \
                                        SPCR |= (1<<SPIE) | (1<<SPE); \
                                        SPDR = d; \
                                    } while(0)

static inline void spi_startNew()
{
    spiData_t *data = circularBufferDrop((circularBuffer_t*)&spiBuffer);
    if (data != NULL)
    {
        spiActiveData = (spiActiveData_t) {
            .transaction = data->transaction,
            .out = data->transaction->out,
            .in = data->transaction->in,
            .len = data->transaction->len,
            .taskHandle = data->taskHandle,
            .flags = data->flags
        };
        if (spiMode == _SPI_MODE_MASTER)
            spiActiveData.transaction->status = _SPI_TRANSACTION_STATUS_ACTIVE |
                (_SPI_TRANSACTION_STATUS_RUNNING);
        else
            spiActiveData.transaction->status = _SPI_TRANSACTION_STATUS_ACTIVE;

        if (spiMode == _SPI_MODE_MASTER) // must be set here because of master-lost possibility
            _SPI_SETUP(data->config, 1);
        else
            _SPI_SETUP(data->config, 0);

        void (*fcnStart)(void) = spiActiveData.transaction->fcnStart;
        if (fcnStart != NULL)
            fcnStart();

        if (spiActiveData.out != NULL)
            _SPI_ENABLE_AND_START(*spiActiveData.out);
        else
            _SPI_ENABLE_AND_START(0);
        spiActiveData.out++;
        spiActiveData.len--;
    }
}

#undef _SPI_SETUP
#undef _SPI_ENABLE_AND_START

error_t spi_run(spiTransaction_t *transaction, spiConfig_t config)
{
    const uint32_t eFlags = 1;
    //error_t e = spi_runAsync(transaction, config, eFlags);
    volatile error_t e = spi_runAsync(transaction, config, eFlags);
    if (e == SPI_ERROR_SUCCESS)
    {
        if (xTaskNotifyWait(pdFALSE, eFlags, NULL, SPI_CONFIG_PORT_DELAY) != pdPASS)
            e = SPI_ERROR_WAIT_TIMEOUT;
    }
    return e;
}

static inline error_t spi_mutexTake()
{
    if (spiMutex == NULL)
        spiMutex = xSemaphoreCreateMutexStatic((StaticSemaphore_t*)&spiMutexStatic);
    if (xSemaphoreTake(spiMutex, SPI_CONFIG_PORT_DELAY) != pdTRUE)
        return SPI_ERROR_MUTEX_TAKE_FAILED;
    else
        return SPI_ERROR_SUCCESS;
}

static inline error_t spi_mutexGive()
{
    if (xSemaphoreGive(spiMutex) != pdTRUE)
        return SPI_ERROR_MUTEX_GIVE_FAILED;
    else
        return SPI_ERROR_SUCCESS;
}

#define _SPI_IS_ACTIVE()                ( SPCR & (1<<SPE) )

error_t spi_runAsync(spiTransaction_t *transaction, spiConfig_t config, uint32_t eFlags)
{
    error_t e = SPI_ERROR_SUCCESS;
    //_SPI_MUTEX_TAKE(dataMutex, dataMutexStatic, e);
    //ON_ERROR_RETURN(e);
    ON_ERROR_RETURN(spi_mutexTake());
    if (spiMode == _SPI_MODE_DISABLED)
        e = SPI_ERROR_NOT_INITIALIZED;
    if (transaction->len == 0)
        e = SPI_ERROR_SIZE_ZERO;
    else
    {
        spiData_t *data = circularBufferNext((circularBuffer_t*)&spiBuffer);
        if (data == NULL)
            e = SPI_ERROR_BUFFER_FULL;
        else
        {
            transaction->status = 0;
            data->transaction = transaction;
            data->config = config;
            data->taskHandle = xTaskGetCurrentTaskHandle();
            data->flags = eFlags;
            taskENTER_CRITICAL();
            if (!_SPI_IS_ACTIVE())
                spi_startNew();
            taskEXIT_CRITICAL();
        }
    }
    //_SPI_MUTEX_GIVE(dataMutex, e);
    ON_ERROR_RETURN(spi_mutexGive());
    return e;
}

#undef _SPI_IS_ACTIVE

#undef _SPI_MUTEX_TAKE
#undef _SPI_MUTEX_GIVE

#define _SPI_DISABLE()      do { \
                                SPCR = 0; \
                            } while(0)

static void spi_stop()
{
    _SPI_DISABLE();
    _SPI_RESET_STATUS();
}

#undef _SPI_RESET_STATUS

#define _SPI_READ_DATA(d)   do { \
                                d = SPDR; \
                            } while(0)

#define _SPI_WRITE_DATA(d)  do { \
                                SPDR = d; \
                            } while(0)

#define _SPI_IS_WRITE_COLLISION()   ( SPSR & (1<<WCOL) )

#define _SPI_IS_MASTER_LOST(s)      ( s == _SPI_MODE_MASTER && !(SPCR & (1<<MSTR)) )

ISR(SPI_STC_vect)
{
    bool finished;
    if (_SPI_IS_WRITE_COLLISION())
    {
        spiActiveData.transaction->status = _SPI_TRANSACTION_STATUS_FINISHED |
            _SPI_TRANSACTION_STATUS_WRITE_COLLISION;
        finished = true;
    }
    else if (_SPI_IS_MASTER_LOST(spiMode))
    {
        spiActiveData.transaction->status = _SPI_TRANSACTION_STATUS_FINISHED |
            _SPI_TRANSACTION_STATUS_MASTER_LOST;
        finished = true;
    }
    else if (spiActiveData.len > 0)
    {
        void (*fcnUpdate)(void) = spiActiveData.transaction->fcnUpdate;
        if (fcnUpdate != NULL)
            fcnUpdate();
        if (spiActiveData.out != NULL)
        {
            _SPI_WRITE_DATA(*spiActiveData.out);
            spiActiveData.out++;
        }
        else
            _SPI_WRITE_DATA(0);
        if (spiActiveData.in != NULL)
        {
            _SPI_READ_DATA(*spiActiveData.in);
            spiActiveData.in++;
        }
        spiActiveData.len--;
        finished = false;
    }
    else
    {
        if (spiActiveData.in != NULL)
            _SPI_READ_DATA(*spiActiveData.in);
        spiActiveData.transaction->status = _SPI_TRANSACTION_STATUS_FINISHED;
        finished = true;
    }

    if (finished)
    {
        void (*fcnStop)(void) = spiActiveData.transaction->fcnStop;
        if (fcnStop != NULL)
            fcnStop();
        _SPI_DISABLE();
        xTaskNotifyFromISR(spiActiveData.taskHandle, spiActiveData.flags, eSetBits, NULL);
        spi_startNew();
    }
}

#undef _SPI_READ_DATA
#undef _SPI_WRITE_DATA
#undef _SPI_IS_WRITE_COLLISION
#undef _SPI_IS_MASTER_LOST

#undef _SPI_DISABLE