; File:		irTxSlowBiphaseATmega8\main.asm
; Device:	ATmega8
; Created:	21. 10. 2023
; Version:	2023-10-22

#define round(X) (int(1.0*(X)+0.5))
.include <m8def.inc> ; implicitly included by Microchip Studio

; == General definitions ==
; Set the CPU clock frequency in Hz:
.equ F_CPU = 3_686_400

; == IR definitions ==
; Set some test commands:
.equ IR_CMD_TEST0 = $D2
.equ IR_CMD_TEST1 = $79
; SlowBiphase modulation definitions:
.equ IR_WIDTH = 10 ; pulse or pause width in milliseconds

; == Hardware definitions ==
; Set switch connection:
.equ SWITCH_PIN = PINC
.equ SWITCH_PORT = PORTC
.equ SWITCH0 = 0
.equ SWITCH1 = 1
; Set OC1A = IR output (high active -> LED on at high state):
.equ OC1A_DDR = DDRB
.equ OC1A_PORT = PORTB
.equ OC1A = 1

; == Register definitions ==
; === Auxiliary registers ===
.def zero = r2
.def temp0 = r16
.def temp1 = r17
.def temp2 = r18

; === IR TX registers ===
.def ir_intrCntr = r19
.def ir_data = r20
.def ir_mask = r21

.org 0
	rjmp	reset
.org OC2addr					; Timer2 Compare Match interrupt
	rjmp	ir_intr
.org INT_VECTORS_SIZE

reset:
; Initialize stack pointer:
	ldi		temp0, high(RAMEND)
	out		SPH, temp0
	ldi		temp0, low(RAMEND)
	out		SPL, temp0
; Initialize general registers:
	clr		zero
; Set input pullups:
	in		temp0, SWITCH_PORT
	ori		temp0, (1<<SWITCH1) | (1<<SWITCH0)
	out		SWITCH_PORT, temp0
; Set output:
	sbi		OC1A_DDR, OC1A
; Initialize Timer1: 36 kHz carrier, output to PB1=OC1A:
.equ OCR1A_VAL = round(F_CPU/(2*36_000))-1
	ldi		temp0, high(OCR1A_VAL)
	out		OCR1AH, temp0
	ldi		temp0, low(OCR1A_VAL)
	out		OCR1AL, temp0
; Initialize Timer2: 10 ms "tick", prescaling 1/1024:
.equ OCR2_VAL = round(1.0*F_CPU*IR_WIDTH/(1024*1000))-1	; == 35
;	ldi		temp0, OCR2_VAL
	ldi		temp0, $FF				; TEST: slower for visible output
	out		OCR2, temp0
	ldi		temp0, 1<<WGM21
	out		TCCR2, temp0
	ldi		temp0, 1<<OCIE2
	out		TIMSK, temp0			; enable Compare Match interrupt
; Enable interrupts:
	sei
; Main loop:
loop:
	in		temp0, SWITCH_PIN
	sbrs	temp0, SWITCH0
	rjmp	loop_1
	sbrc	temp0, SWITCH1
	rjmp	loop
	ldi		ir_data, IR_CMD_TEST1
	rcall	ir_transmit
	rcall	delay1s					; rudimentary switch debouncing
									; (for testing only)
	rjmp	loop
loop_1:
	ldi		ir_data, IR_CMD_TEST0
	rcall	ir_transmit
	rcall	delay1s
	rjmp	loop

; == IR transmitter interrupt routine ==
ir_intr:
; Save temp0 and SREG:
	push	temp0
	in		temp0, SREG
	push	temp0
; Test whether end of transmission is reached:
	cpi		ir_intrCntr, 17
	brsh	ir_intr_stop
; Test whether ir_intrCntr is even or odd:
	sbrc	ir_intrCntr, 0
	rjmp	ir_intr_odd
; Even, just toggle the carrier:
	in		temp0, TCCR2
	sbrc	temp0, CS20
	rjmp	ir_intr_carrierOff
	rjmp	ir_intr_carrierOn
ir_intr_stop:
; After last bit. Switch off carrier and stop interrupt timer:
	in		temp0, TCCR2
	andi	temp0, ~((1<<CS22)|(1<<CS21)|(1<<CS20))
	out		TCCR2, temp0								; stop timer
	out		TCNT2, zero
	rjmp	ir_intr_carrierOff
ir_intr_odd:
; Odd ir_intrCntr, load the corresponding bit from ir_data:
	mov		temp0, ir_data
	and		temp0, ir_mask
	lsl		ir_mask					; prepare mask for next bit
	tst		temp0
	breq	ir_intr_data0
; Bit == 1, clear carrier if not already switched off:
	in		temp0, TCCR2
	sbrc	temp0, CS20
	rjmp	ir_intr_carrierOff
	rjmp	ir_intr_inc
ir_intr_data0:
; Bit == 0, set carrier if not already switched on:
	in		temp0, TCCR2
	sbrs	temp0, CS20
	rjmp	ir_intr_carrierOn
	rjmp	ir_intr_inc
ir_intr_carrierOff:
	ldi		temp0, 1<<WGM12
	out		TCCR1B, temp0						; stop timer
	out		TCCR1A, zero						; disable I/O pin override
	out		TCNT1H, zero
	out		TCNT1L, zero
	cbi		OC1A_PORT, OC1A						; switch off IR LED
	rjmp	ir_intr_inc
ir_intr_carrierOn:
	sbi		OC1A_PORT, OC1A						; switch on IR LED
	ldi		temp0, 1<<COM1A0
	out		TCCR1A, temp0						; toggle OC1A on Compare Match
	ldi		temp0, (1<<WGM12) | (1<<CS10)
	out		TCCR1B, temp0						; start timer, CTC mode, no prescaling
ir_intr_inc:
	inc		ir_intrCntr
ir_intr_end:
; Restore SREG and temp0:
	pop		temp0
	out		SREG, temp0
	pop		temp0
	reti

; == Routine delay1s ==
; (for testing only)
delay1s:
	push	temp0
	push	temp1
	push	temp2
	ldi		temp0, F_CPU*10/607/1_000
delay1s_loop0:
	ldi		temp1, 201
delay1s_loop1:
	ldi		temp2, 100
delay1s_loop2:
	dec		temp2
	brne	delay1s_loop2
	dec		temp1
	brne	delay1s_loop1
	dec		temp0
	brne	delay1s_loop0
	pop		temp2
	pop		temp1
	pop		temp0
	ret

; == Routine ir_transmit ==
; Parameter: temp0: command
ir_transmit:
	push	temp0
	clr		ir_intrCntr
	ldi		ir_mask, 1
; Start Timer2:
	in		temp0, TCCR2
	ori		temp0, (1<<CS22)|(1<<CS21)|(1<<CS20)	; prescaling 1/1024
	out		TCCR2, temp0
	pop		temp0
	ret