SLdt 2406241720

fuer Johannes T. Fechner

main.asm:

; == Do the NVM operation ==
	ldiz	2*szSendingSts0
	rcall	uart_putSz

	ldi		tmp0, low(NVMCTRL_CTRLA)
	ldi		tmp1, high(NVMCTRL_CTRLA)
;	ldi		tmp2, NVMCTRL_CMD_FUSEWRITE_gc
	ldi		tmp2,0x13 ; DD: EEERWR EEPROM Erase and Write Enable
	rcall	sendSts
	rcall	wait5ms	; ?

	lds		tmp0, writeFuseAddrL_ram
	lds		tmp1, writeFuseAddrH_ram
	lds		tmp2, writeFuseData_ram
	rcall	sendSts
	rcall	wait5ms ; ?

/* forget it:
; Write address LSB:
	rcall	updi_wait25ms
	ldi		tmp0, low(NVMCTRL_ADDR)
	ldi		tmp1, high(NVMCTRL_ADDR)
	lds		tmp2, writeFuseAddrL_ram
	rcall	sendSts
	cpi		tmp3, 0
	brne	loop_writeFuse_sts01
	ldiz	2*szOK
	rcall	uart_putSz
	ldiz	2*szLineBreak
	rcall	uart_putSz
	rjmp	loop_writeFuse_sts1
loop_writeFuse_sts01:
	cpi		tmp3, 1
	brne	loop_writeFuse_sts02
	rjmp	loop_timeout
loop_writeFuse_sts02:
	ldiz	2*szLineBreak
	rcall	uart_putSz
	ldiz	2*szErrInvAnswer
	rcall	uart_putSz
	rjmp	loop_exit
loop_writeFuse_sts1:
	ldiz	2*szSendingSts1
	rcall	uart_putSz
; Write address MSB:
	rcall	updi_wait25ms
	ldi		tmp0, low(NVMCTRL_ADDR+1)
	ldi		tmp1, high(NVMCTRL_ADDR+1)
	lds		tmp2, writeFuseAddrH_ram
	rcall	sendSts
	cpi		tmp3, 0
	brne	loop_writeFuse_sts11
	ldiz	2*szOK
	rcall	uart_putSz
	ldiz	2*szLineBreak
	rcall	uart_putSz
	rjmp	loop_writeFuse_sts2
loop_writeFuse_sts11:
	cpi		tmp3, 1
	brne	loop_writeFuse_sts12
	rjmp	loop_timeout
loop_writeFuse_sts12:
	ldiz	2*szLineBreak
	rcall	uart_putSz
	ldiz	2*szErrInvAnswer
	rcall	uart_putSz
	rjmp	loop_exit
loop_writeFuse_sts2:
	ldiz	2*szSendingSts2
	rcall	uart_putSz
; Write data:
	rcall	updi_wait25ms
	ldi		tmp0, low(NVMCTRL_DATA)
	ldi		tmp1, high(NVMCTRL_DATA)
	lds		tmp2, writeFuseData_ram
	rcall	sendSts
	cpi		tmp3, 0
	brne	loop_writeFuse_sts21
	ldiz	2*szOK
	rcall	uart_putSz
	ldiz	2*szLineBreak
	rcall	uart_putSz
	rjmp	loop_writeFuse_sts3
loop_writeFuse_sts21:
	cpi		tmp3, 1
	brne	loop_writeFuse_sts22
	rjmp	loop_timeout
loop_writeFuse_sts22:
	ldiz	2*szLineBreak
	rcall	uart_putSz
	ldiz	2*szErrInvAnswer
	rcall	uart_putSz
	rjmp	loop_exit
loop_writeFuse_sts3:
	ldiz	2*szSendingSts3
	rcall	uart_putSz
; Issue Write Fuse command:
	rcall	updi_wait25ms
	ldi		tmp0, low(NVMCTRL_CTRLA)
	ldi		tmp1, high(NVMCTRL_CTRLA)
	ldi		tmp2, NVMCTRL_CMD_FUSEWRITE_gc

ldi tmp2,0x13; EEERWR

	rcall	sendSts
	cpi		tmp3, 0
	brne	loop_writeFuse_sts31
	ldiz	2*szOK
	rcall	uart_putSz
	ldiz	2*szLineBreak
	rcall	uart_putSz
	rjmp	loop_writeFuse_waitNvm
loop_writeFuse_sts31:
	cpi		tmp3, 1
	brne	loop_writeFuse_sts32
	rjmp	loop_timeout
loop_writeFuse_sts32:
	ldiz	2*szLineBreak
	rcall	uart_putSz
	ldiz	2*szErrInvAnswer
	rcall	uart_putSz
	rjmp	loop_exit
loop_writeFuse_waitNvm:
; == Wait while NVMCTRL is busy ==
	rcall	waitForNvm
	sbrc	tmp3, 0
	rjmp	loop_timeout
	ldiz	2*szNvmctrlStatus
	rcall	uart_putSz
	mov		tmp0, tmp2
	rcall	uart_putHexByte
	ldiz	2*szLineBreak
	rcall	uart_putSz
*/
; == Issue a System Reset to the target device ==
	ldiz	2*szReset

;**********************************************************

	rcall	updi_tx
wait_ns_ 10000,0
; Wait for first 'ACK' from Target UPDI:
sendSts_wait0:

;**********************************************************

	rjmp	sendSts_wait0
; updiUartData_ram now contains the received byte.

rcall wait1ms

    lds     tmp0, updiUartDataBuf_ram

;**********************************************************
;**********************************************************


.macro	wait_ns_		; ns, -Takte					; nach 'Klaus2m5'
.set cycle_time_ns = (1000000 / fkHz)
.set cycles = ((@0 + cycle_time_ns - 1) / cycle_time_ns - @1)
.if (cycles > (255 * 3 + 2))
.error "wait_ns_ overflow"
.else
.if (cycles > 6)
.set  loop_cycles = (cycles / 3)      
	ldi		tmp0,loop_cycles
	 dec	tmp0
	brne	pc-1
.set  cycles = (cycles - (loop_cycles * 3))
.endif
.if (cycles > 0)
.if (cycles & 4)
	rjmp	pc+1
	rjmp	pc+1
.endif
.if (cycles & 2)
	rjmp	pc+1
.endif
.if (cycles & 1)
	nop
.endif
.endif
.endif
.endmacro