; == Do the NVM operation ==
; EEERWR - EEPROM Erase and Write Enable:
    ldi     tmp0, low(NVMCTRL_CTRLA)
    ldi     tmp1, high(NVMCTRL_CTRLA)
    lds     tmp2, 0x13 ; EEEWRW command.
    rcall   sendSts
    cpi     tmp3, 0
    breq    loop_writeEeprom_addrData
    cpi     tmp3, 1
    breq    loop_timeout
    rjmp    loop_exit

loop_writeEeprom_addrData:
    rcall   updi_wait25ms
; Send EEPROM address and data:
    lds     tmp0, writeAddrL_ram
    lds     tmp1, writeAddrH_ram
    lds     tmp2, writeData_ram
    rcall   sendSts
    cpi     tmp3, 0
    breq    loop_writeEeprom_noCmd
    cpi     tmp3, 1
    breq    loop_timeout
    rjmp    loop_exit

loop_writeEeprom_noCmd:
/*  rcall   updi_wait25ms
; Send NOCMD:
    ldiz    2*szSendingSts
    rcall   uart_putSz
    lds     tmp0, low(NVMCTRL_CTRLA)
    lds     tmp1, high(NVMCTRL_CTRLA)
    lds     tmp2, 0x00 ; NOCMD = no command.
    rcall   sendSts
    cpi     tmp3, 0
    breq    loop_writeEeprom_waitNvm
    cpi     tmp3, 1
    breq    loop_timeout
    rjmp    loop_exit */
	
loop_writeEeprom_waitNvm:
; == Wait while NVMCTRL is busy ==
    rcall   waitForNvm
    sbrc    tmp1, 0
    rjmp    loop_timeout
    ldiz    2*szNvmctrlStatus
    rcall   uart_putSz
    rcall   uart_putHexByte
    ldiz    2*szLineBreak
    rcall   uart_putSz
	
; == Issue a System Reset to the target device ==
    ldiz    2*szReset
    rcall   uart_putSz
    rcall   applyReset
    rcall   updi_idle
    rcall   updi_wait25ms
    rcall   releaseReset
    rcall   updi_idle
    ldiz    2*szLineBreak
    rcall   uart_putSz
    rjmp    loop_exit