Read register 0: 0x88 -> Chip Family 0x88 Read register 1: 0x31 -> 7-4: -> M Series -> 1: Start Switch Read register 2: 0x00 -> New Back-Off Disabled -> Flush Dynamic MAC Tables no -> Flush static MAC Tables no -> Pass flow control package no Read register 3: 0x34 0b 0011 0100 -> Pass all Frames no -> Port 3 Tail Tag Mode enable no -> IEEE 802.3x TX Flow control enabled -> IEEE 802.3x RX Flow control enabled -> Frame length field not checked -> Enable Age function in the chip !! -> Fast age disabled -> Aggressive Back-Off disabled Read register 4: 0xF0 0b 1111 0000 -> Unicast port-VLAN mismatch discarded -> Multicast storm protection disabled -> Carrier sense based back pressure is selected -> Flow control fair mode selected -> Excessive collision drop disabled -> 1536 Byte MTU Read register 5: 0x00 -> VLAN disabled -> IGMP Snoop disabled on MII -> Sniff mode deselected Read register 6: 0x20 0b 0010 0000 -> enable MII interface full-duplex mode -> switch interface in 100Mbps mode -> no replacement for NULL VID Read register 7: 0x63 -> Broadcast storm protection rate Read register 8: 0x00 -> Factory 0x00 Read register 9: 0x24 -> Factory 0x24 Read register 10: 0x35 -> Factory 0x35 Read register 11: 0x88 0b 1000 1000 -> SPI clock speed up to 31.25MHz Read register 12: 0x50 0b 0101 0000 -> IEE802.1p mapping Read register 13: 0xFA -> IEE802.1p mapping Read register 14: 0x47 0b 0100 0111 -> Do not send packages with unknown destination MAC to specific ports -> IO pad drive strength 16mA -> Send packages with unknown MAC to all three ports Read register 15: 0x08 0b 0000 1000 -> Port 1 PHY address is 0x1 Read register 16: 0x00 -> Port 1 disable broadcast storm protection -> Disable DiffServ function -> Disable 802.1p -> ingress packages will be priority 0 -> Disable tag insertion -> disable tag removal -> no TXQ splitting Read register 17: 0x07 0b0000 0111 -> no receive monitoring -> no transmit monitoring -> no double tagged on all packages -> do not replace user priority field -> include port in all vlan memberships Read register 18: 0x06 0b 0000 0110 -> Disable 2 Queue split TX -> no ingress VLAN filtering -> no packets will be discarded -> full duplex flow control is enabled based on AN result -> disable ports half-duplex back pressure -> Enable TX -> Enable RX -> Enable switch address learning Read register 19: 0x00 -> VLAN Default tag 1 Read register 20: 0x01 -> VLAN Default tag 1 Read register 21: 0x00 -> Disable port 1 self-address filtering -> Disable Port 2 self-address filtering -> Disable drop ingress tagged frame -> limit and count all frames -> IFG bytes are not counted -> Preamble bytes are not counted Read register 22: 0x00 -> Q0 ingress data rate limit 0 Read register 23: 0x00 -> Q1 ingress data rate limit 0 Read register 24: 0x00 -> Q2 ingress data rate limit 0 Read register 25: 0x00 -> Q3 ingress data rate limit 0 Read register 26: 0x04 0b 0000 0100 -> Cable diagnostic test diabled -> No force link pass -> Normal operation Read register 27: 0x00 -> VCT fault count 0 Read register 28: 0xFF -> Auto negotiation on -> Force 100BT if AN disabled -> Force Fuull duplex if AN disabled -> Advertise flow control capability -> advertise 100BT full-duplex -> advertise 100BT half-duplex -> Advertise 10BT full-duplex -> Advertise 10BT half-duplex Read register 29: 0x00 -> LEDs normal operation -> Tranmitter not disabled -> Normal AN operation -> Not powered down -> enable MDI/MDI-X -> loopback normal operations Read register 30: 0xEF 0b 0111 1111 -> MDI-X -> AN done -> Link good -> Link partner flow control capable -> Partner 100BT full-duplex capable -> Partner 100BT half-duplex capable -> Partner 10BT full-duplex capable -> Partner 10BT half-duplex capable Read register 31: 0xA6 1010 0110 -> HP Auto MDI/MDI-X Polarity is reversed -> TX flow control inactive -> RX flow control inactive -> Link speed 100Mbps -> Duplex operation -> no far-end fault Read register 32: 0x00 -> Read register 33: 0x07 Read register 34: 0x16 Read register 35: 0x00 Read register 36: 0x01 Read register 37: 0x00 Read register 38: 0x00 Read register 39: 0x00 Read register 40: 0x00 Read register 41: 0x00 Read register 42: 0x04 Read register 43: 0x00 Read register 44: 0xFF Read register 45: 0x00 Read register 46: 0x1F Read register 47: 0x80 Read register 48: 0x00 PORT 3 CONTROL 0 -> Disable broadcast storm protection -> Disabler DiffServ function -> Disable 802.1p -> diable tag insertion -> disable tag removal -> no TXQ Split Read register 49: 0x07 0b 0000 0111 -> port is a normal port -> no receive monitoring -> no transmit monitoring -> do not double tag all packages -> do not compare and replace user priority -> Port member of all VLANs Read register 50: 0x06 0b 0000 0110 -> Disable TX queue splitting -> no ingress vlan filter -> no packages will be discarded -> full-duplex flow controll based on AN -> disable port half-duplex back pressure -> TX enable -> RX enable -> learning disabled Read register 51: 0x00 -> Default VLAN TAG 1 Read register 52: 0x01 -> Default VLAN TAG 1 Read register 53: 0x00 -> Port 3 MII Phy mode -> Self-Adress filter disabled -> no ingrss tagged frame -> limit and count all frames -> ifg bytes are not counted ->preamble bytes are not counted Read register 54: 0x00 -> Poert2 original RefCLK selected -> Ingress data rate limit Q0 0 Read register 55: 0x00 Read register 56: 0x00 Read register 57: 0x00 Read register 58: 0x00 -> not applicable Read register 59: 0x00 -> Not applicable Read register 60: 0x00 -> Not applicable Read register 61: 0x00 -> Not applicable Read register 62: 0x00 -> Not applicable Read register 63: 0x1E 0b 0001 1110 -> TX flow control active -> RX flow control active -> link speed 100MBps -> Full-Duplex operation Read register 64: 0x00 UNKNOWN Read register 65: 0x00 UNKNOWN Read register 66: 0x20 UNKNOWN Read register 67: 0xE0 0b 1110 0000 Read register 68: 0x06 Read register 69: 0x00 Read register 70: 0x00 Read register 71: 0x00 Read register 72: 0x00 Read register 73: 0x40 Read register 74: 0x22 Read register 75: 0x00 Read register 76: 0x00 Read register 77: 0x00 Read register 78: 0x00 Read register 79: 0x00 Read register 80: 0x02 Read register 81: 0x04 Read register 82: 0x00 Read register 83: 0x00 Read register 84: 0x00 Read register 85: 0x00 Read register 86: 0x00 Read register 87: 0x00 Read register 88: 0x00 Read register 89: 0x00 Read register 90: 0x00 Read register 91: 0x00 Read register 92: 0x00 Read register 93: 0x00 Read register 94: 0x00 Read register 95: 0x00 Read register 96: 0x00 Read register 97: 0x00 Read register 98: 0x00 Read register 99: 0x00 Read register 100: 0x00 Read register 101: 0x00 Read register 102: 0x00 Read register 103: 0x00 Read register 104: 0x00 Read register 105: 0x00 Read register 106: 0x00 Read register 107: 0x00 Read register 108: 0x00 Read register 109: 0x00 Read register 110: 0x00 Read register 111: 0x00 Read register 112: 0x00 Read register 113: 0x10 Read register 114: 0xA1 Read register 115: 0xFF Read register 116: 0xFF Read register 117: 0xFF Read register 118: 0x00 Read register 119: 0x00 Read register 120: 0x00 Read register 121: 0x00 Read register 122: 0x00 Read register 123: 0x00 Read register 124: 0x00 Read register 125: 0x00 Read register 126: 0x00 Read register 127: 0x00 Read register 128: 0x00 Read register 129: 0x00 Read register 130: 0x00 Read register 131: 0x00 Read register 132: 0x00 Read register 133: 0x26 Read register 134: 0x00 Read register 135: 0x18 Read register 136: 0x08 Read register 137: 0x00 Read register 138: 0x00 Read register 139: 0x00 Read register 140: 0x00 Read register 141: 0x01 Read register 142: 0x00 Read register 143: 0x00 Read register 144: 0x00 Read register 145: 0x00 Read register 146: 0x00 Read register 147: 0x00 Read register 148: 0x00 Read register 149: 0x00 Read register 150: 0x00 Read register 151: 0x00 Read register 152: 0x00 Read register 153: 0x00 Read register 154: 0x00 Read register 155: 0x00 Read register 156: 0x00 Read register 157: 0x00 Read register 158: 0x00 Read register 159: 0x00 Read register 160: 0x00 Read register 161: 0x00 Read register 162: 0x00 Read register 163: 0x00 Read register 164: 0x00 Read register 165: 0x00 Read register 166: 0x53 Read register 167: 0x45 Read register 168: 0x35 Read register 169: 0x25 Read register 170: 0x15 Read register 171: 0x98 Read register 172: 0x10 Read register 173: 0x08 Read register 174: 0x05 Read register 175: 0x88 Read register 176: 0x84 Read register 177: 0x82 Read register 178: 0x81 Read register 179: 0x88 Read register 180: 0x84 Read register 181: 0x82 Read register 182: 0x81 Read register 183: 0x88 Read register 184: 0x84 Read register 185: 0x82 Read register 186: 0x81 Read register 187: 0x00 Read register 188: 0x87 Read register 189: 0x00 Read register 190: 0x00 Read register 191: 0x00 Read register 192: 0x03 Read register 193: 0x00 Read register 194: 0x00 Read register 195: 0x00 Read register 196: 0xC8 Read register 197: 0x00 Read register 198: 0x01 Read register 199: 0x00 Read register 200: 0x00 Read register 201: 0x00 Read register 202: 0x00 Read register 203: 0x00 Read register 204: 0x00 Read register 205: 0x00 Read register 206: 0x00 Read register 207: 0x00 Read register 208: 0x00 Read register 209: 0x00 Read register 210: 0x00 Read register 211: 0x00 Read register 212: 0x00 Read register 213: 0x00 Read register 214: 0x00 Read register 215: 0x00 Read register 216: 0x00 Read register 217: 0x00 Read register 218: 0x00 Read register 219: 0x00 Read register 220: 0x00 Read register 221: 0x00 Read register 222: 0x00 Read register 223: 0x00 Read register 224: 0x00 Read register 225: 0x00 Read register 226: 0x00 Read register 227: 0x00 Read register 228: 0x00 Read register 229: 0x00 Read register 230: 0x00 Read register 231: 0x00 Read register 232: 0x00 Read register 233: 0x00 Read register 234: 0x00 Read register 235: 0x00 Read register 236: 0x00 Read register 237: 0x00 Read register 238: 0x00 Read register 239: 0x00