Connecting multiply models to an output bus.

[Bence (Gast)]

There are a 32 bit output bus, which is connected to two modules.
There is a 5 bit Address bus, and a read signal controlled by bus 
master.

The task is to have 2 readable registers on the bus, with address 1 and 
2, and data 1 and 2.

The problem is, that if both is in one process,
then it works, and if they are in different processes (does not matter, 
if in different file, or in the same file), they does not work.

--Works:

  Decode: process(read)
    begin
      outbus <= (others => 'Z');
      if read = '1' then
        if A(10 downto 5) = "000001" then
          outbus <= x"00000001";
        end if;
        if A(10 downto 5) = "000010" then
          outbus <= x"00000002";
        end if;
      end if;
    end process;

--Does Not work:

Decode: process(read)
  begin
    outbus <= (others => 'Z');
    if read = '1' then
      if A(10 downto 5) = "000001" then
        outbus <= x"00000001";
      end if;
    end if;
  end process;

Decode2: process(read)
  begin
    outbus <= (others => 'Z');
    if read = '1' then
      if A(10 downto 5) = "000010" then
        outbus <= x"00000002";
      end if;
    end if;
  end process;

Any help would be highly appreciated.

Thank You,
Bence

[PittyJ (Gast)]

In the first process (which should work), I would have used an else:

       if A(10 downto 5) = "000001" then
          outbus <= x"00000001";
        elsif A(10 downto 5) = "000010" then
          outbus <= x"00000002";
        end if;


The second processes: As far as I know, this should not work because 
only one process may drive an output signal. (But I might be wrong)

[Duke Scarring (Gast)]

You could use tristate busses. But I can't really recommend this:

Decode: process(read)
  begin
    outbus1 <= (others => 'Z');
    if read = '1' then
      if A(10 downto 5) = "000001" then
        outbus1 <= x"00000001";
      end if;
    end if;
  end process;
 
Decode2: process(read)
  begin
    outbus2 <= (others => 'Z');
    if read = '1' then
      if A(10 downto 5) = "000010" then
        outbus2 <= x"00000002";
      end if;
    end if;
  end process;

  outbus <= outbus1 or outbus2;

This will be replaced on synthesis by an multiplexer. So you can do this 
replacement by your own.

Duke