Atmega32 code auf ATXMega Portieren

[Simon (Gast)]

Was heißt hier "positive clock phase" ?
1. SCK high when idle ?
2. SCK low when idle ?


Atmega32:
//SPI: enable, master, positive clock phase, msb first, SPI speed fosc/2
  SPCR = (1<<SPE) | (1<<MSTR);
  SPSR = (1<<SPI2X);

Welchem SPI Mode entspricht das bei einem XMega?



· Bit 3 ­ CPOL: Clock Polarity
When this bit is written to one, SCK is high when idle. When CPOL is 
written to zero,
SCK is low when idle. Refer to Figure 67 and Figure 68 for an example. 
The CPOL func-
tionality is summarized below:





Atxmega: ?
  SPI_CTRL.CTRL = SPI_ENABLE_bm | SPI_MASTER_bm | SPI_MODE_0_gc | 
SPI_PRESCALER_DIV64_gc;