1 | void USART1_Init(void)
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2 |
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3 | {
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4 |
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5 |
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6 | RCC->APB2RSTR |= RCC_APB2RSTR_USART1RST;//Usart1 Reset
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7 | RCC->APB2RSTR &= (~RCC_APB2RSTR_USART1RST);
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8 | RCC->AHBENR |= RCC_AHBENR_GPIOAEN; //GPIOA Clock Enable
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9 | RCC->APB2ENR |= RCC_APB2ENR_USART1EN;//USART1 Clock Enable
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10 | RCC->CFGR3 |= RCC_CFGR3_USART1SW_0;//System clock (SYSCLK) selected as USART1 clock
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11 | RCC->CFGR3 &= ~RCC_CFGR3_USART1SW_1;
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12 |
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13 | GPIOA->MODER |=GPIO_MODER_MODER9_1|GPIO_MODER_MODER10_1 ;//p9(TX)&p10(RX) Alternative function mode
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14 | GPIOA->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR9_0|GPIO_OSPEEDER_OSPEEDR9_1| //50 MHz speed
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15 | GPIO_OSPEEDER_OSPEEDR10_0|GPIO_OSPEEDER_OSPEEDR10_1;
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16 |
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17 | GPIOA->AFR[1] |= 0x00000100|0x00000200|0x00000400| //AF7
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18 | 0x00000010|0x00000020|0x00000040;
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19 |
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20 |
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21 | USART1->BRR = (SystemCoreClock / 9600);//Baudrate 9600
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22 | USART1->CR1 |= USART_CR1_UE;//Usart enable
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23 | USART1->CR1 |= USART_CR1_TE |USART_CR1_RE|USART_CR1_RXNEIE ;//Receive & Transmit enable
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24 | NVIC_EnableIRQ(USART1_IRQn);
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25 | //NVIC_EnableIRQ(USART1_EXTI25_IRQN);
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26 |
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27 |
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28 | }
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29 |
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30 |
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31 | void USART1_PutChar(uint8_t ch)//write a character in the Transmit Data Register
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32 |
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33 | {
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34 |
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35 | while(!(USART1->ISR & USART_ISR_TXE));
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36 |
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37 | USART1->TDR = ch;
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38 |
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39 | }
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40 |
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41 |
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42 | void USART1_IRQHandler (void)
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43 |
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44 | {
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45 |
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46 | if(USART1->ISR & USART_ISR_RXNE){
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47 |
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48 | if(ctr<1)
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49 | {
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50 | send[ctr]=USART1->RDR;
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51 | ctr++;
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52 | //opc(send[0]);
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53 | }
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54 |
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55 | else if(ctr<max_wordlength)
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56 | {
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57 | send[ctr]=USART1->RDR;
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58 | ctr++;
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59 |
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60 |
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61 | }
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62 |
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63 | else
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64 | {
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65 |
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66 | for(ctr=0;ctr<max_wordlength;ctr++){send[ctr]=0;}
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67 | ctr=0;
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68 | send[ctr]=USART1->RDR;
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69 | ctr++;
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70 | }
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71 | }
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72 | }
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73 | void USART1_String(char*string)//write a String in the Transmit Data Register
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74 |
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75 | { int laenge=sizeof(string);
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76 | int i=0;
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77 | while(i<=(laenge+1)){
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78 | USART1_PutChar(string[i]);
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79 | i++;
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80 | }
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81 |
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82 |
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83 |
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84 | }
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85 |
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86 |
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87 | void USART2_Init(void)
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88 |
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89 | {
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90 |
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91 |
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92 | RCC->APB1RSTR |= RCC_APB1RSTR_USART2RST;//Usart2 Reset
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93 | RCC->APB1RSTR &= (~RCC_APB1RSTR_USART2RST);
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94 | RCC->AHBENR |= RCC_AHBENR_GPIODEN; //GPIOD Clock Enable
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95 | RCC->APB1ENR |= RCC_APB1ENR_USART2EN;//USART2 Clock Enable
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96 | RCC->CFGR3 |= RCC_CFGR3_USART2SW_0;//System clock (SYSCLK) selected as USART2 clock
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97 | RCC->CFGR3 &= ~RCC_CFGR3_USART2SW_1;
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98 |
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99 | GPIOD->MODER |=GPIO_MODER_MODER5_1|GPIO_MODER_MODER6_1 ;//p5(TX)&p6(RX) Alternative function mode
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100 | GPIOD->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR5_0|GPIO_OSPEEDER_OSPEEDR5_1| //50 MHz speed
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101 | GPIO_OSPEEDER_OSPEEDR6_0|GPIO_OSPEEDER_OSPEEDR6_1;
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102 |
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103 | GPIOD->AFR[1] |= 0x00000100|0x00000200|0x00000400| //AF7
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104 | 0x00000010|0x00000020|0x00000040;
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105 |
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106 |
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107 | USART2->BRR = (SystemCoreClock / 9600);//Baudrate 9600
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108 | USART2->CR1 |= USART_CR1_UE;//Usart enable
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109 | USART2->CR1 |= USART_CR1_TE |USART_CR1_RE|USART_CR1_RXNEIE ;//Receive & Transmit enable
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110 | NVIC_EnableIRQ(USART2_IRQn);
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111 |
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112 |
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113 |
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114 | }
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115 |
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116 |
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117 | void USART2_PutChar(uint8_t ch)//write a character in the Transmit Data Register
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118 |
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119 | {
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120 |
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121 | while(!(USART2->ISR & USART_ISR_TXE));
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122 |
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123 | USART2->TDR = ch;
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124 |
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125 | }
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126 |
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127 |
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128 | void USART2_IRQHandler (void)
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129 |
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130 | {
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131 |
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132 | if(USART2->ISR & USART_ISR_RXNE){
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133 |
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134 | if(ctr<1)
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135 | {
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136 | send[ctr]=USART2->RDR;
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137 | ctr++;
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138 | //opc(send[0]);
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139 | }
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140 |
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141 | else if(ctr<max_wordlength)
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142 | {
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143 | send[ctr]=USART2->RDR;
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144 | ctr++;
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145 |
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146 |
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147 | }
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148 |
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149 | else
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150 | {
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151 |
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152 | for(ctr=0;ctr<max_wordlength;ctr++){send[ctr]=0;}
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153 | ctr=0;
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154 | send[ctr]=USART2->RDR;
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155 | ctr++;
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156 | }
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157 | }
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158 | }
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159 | void USART2_String(char*string)//write a String in the Transmit Data Register
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160 |
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161 | { int laenge=sizeof(string);
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162 | int i=0;
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163 | while(i<=(laenge+1)){
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164 | USART2_PutChar(string[i]);
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165 | i++;
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166 | }
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167 |
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168 |
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169 |
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170 | }
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171 |
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172 |
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173 |
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174 | void USART3_Init(void)
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175 |
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176 | {
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177 |
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178 |
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179 | RCC->APB1RSTR |= RCC_APB1RSTR_USART3RST;//Usart3 Reset
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180 | RCC->APB1RSTR &= (~RCC_APB1RSTR_USART3RST);
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181 | RCC->AHBENR |= RCC_AHBENR_GPIOBEN; //GPIOb Clock Enable
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182 | RCC->APB1ENR |= RCC_APB1ENR_USART3EN;//USART3 Clock Enable
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183 | RCC->CFGR3 |= RCC_CFGR3_USART3SW_0;//System clock (SYSCLK) selected as USART3 clock
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184 | RCC->CFGR3 &= ~RCC_CFGR3_USART3SW_1;
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185 |
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186 | GPIOB->MODER |=GPIO_MODER_MODER10_1|GPIO_MODER_MODER11_1 ;//p10(TX)&p11(RX) Alternative function mode
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187 | GPIOB->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR10_0|GPIO_OSPEEDER_OSPEEDR10_1| //50 MHz speed
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188 | GPIO_OSPEEDER_OSPEEDR11_0|GPIO_OSPEEDER_OSPEEDR11_1;
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189 |
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190 | GPIOB->AFR[1] |= 0x00000700|0x00000070; //afr7
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191 |
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192 |
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193 | USART3->BRR = (SystemCoreClock / 9600);//Baudrate 9600
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194 | USART3->CR1 |= USART_CR1_UE;//Usart enable
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195 | USART3->CR1 |= USART_CR1_TE |USART_CR1_RE|USART_CR1_RXNEIE ;//Receive & Transmit enable
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196 | NVIC_EnableIRQ(USART3_IRQn);
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197 |
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198 |
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199 |
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200 | }
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201 |
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202 |
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203 | void USART3_PutChar(uint8_t ch)//write a character in the Transmit Data Register
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204 |
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205 | {
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206 |
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207 | while(!(USART3->ISR & USART_ISR_TXE));
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208 |
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209 | USART3->TDR = ch;
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210 |
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211 | }
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212 |
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213 |
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214 | void USART3_IRQHandler (void)
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215 |
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216 | {
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217 |
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218 | if(USART3->ISR & USART_ISR_RXNE){
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219 |
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220 | if(ctr<1)
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221 | {
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222 | send[ctr]=USART3->RDR;
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223 | ctr++;
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224 | //opc(send[0]);
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225 | }
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226 |
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227 | else if(ctr<max_wordlength)
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228 | {
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229 | send[ctr]=USART3->RDR;
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230 | ctr++;
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231 |
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232 |
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233 | }
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234 |
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235 | else
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236 | {
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237 |
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238 | for(ctr=0;ctr<max_wordlength;ctr++){send[ctr]=0;}
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239 | ctr=0;
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240 | send[ctr]=USART3->RDR;
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241 | ctr++;
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242 | }
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243 | }
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244 | }
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245 | void USART3_String(char*string)//write a String in the Transmit Data Register
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246 |
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247 | { int laenge=sizeof(string);
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248 | int i=0;
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249 | while(i<=(laenge+1)){
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250 | USART3_PutChar(string[i]);
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251 | i++;
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252 | }
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253 |
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254 |
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255 |
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256 | }
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257 |
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258 |
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259 | void UART4_Init(void)
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260 |
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261 | {
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262 |
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263 |
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264 | RCC->APB1RSTR |= RCC_APB1RSTR_UART4RST;//Uart4 Reset
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265 | RCC->APB1RSTR &= (~RCC_APB1RSTR_UART4RST);
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266 | RCC->AHBENR |= RCC_AHBENR_GPIOCEN; //GPIOC Clock Enable
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267 | RCC->APB1ENR |= RCC_APB1ENR_UART4EN;//UART4 Clock Enable
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268 | RCC->CFGR3 |= RCC_CFGR3_UART4SW_0;//System clock (SYSCLK) selected as UART4 clock
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269 | RCC->CFGR3 &= ~RCC_CFGR3_UART4SW_1;
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270 |
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271 | GPIOC->MODER |=GPIO_MODER_MODER10_1|GPIO_MODER_MODER11_1 ;//p10(TX)&p11(RX) Alternative function mode
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272 | GPIOC->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR10_0|GPIO_OSPEEDER_OSPEEDR10_1| //50 MHz speed
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273 | GPIO_OSPEEDER_OSPEEDR11_0|GPIO_OSPEEDER_OSPEEDR11_1;
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274 |
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275 | GPIOC->AFR[1] |= 0x00000800|0x00000080; //afr8
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276 |
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277 |
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278 | UART4->BRR = (SystemCoreClock / 9600);//Baudrate 9600
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279 | UART4->CR1 |= USART_CR1_UE;//Usart enable
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280 | UART4->CR1 |= USART_CR1_TE |USART_CR1_RE|USART_CR1_RXNEIE ;//Receive & Transmit enable
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281 | NVIC_EnableIRQ(UART4_IRQn);
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282 |
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283 |
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284 |
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285 | }
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286 |
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287 |
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288 | void UART4_PutChar(uint8_t ch)//write a character in the Transmit Data Register
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289 |
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290 | {
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291 |
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292 | while(!(UART4->ISR & USART_ISR_TXE));
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293 |
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294 | UART4->TDR = ch;
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295 |
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296 | }
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297 |
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298 |
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299 | void UART4_IRQHandler (void)
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300 |
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301 | {
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302 |
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303 | if(UART4->ISR & USART_ISR_RXNE){
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304 |
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305 | if(ctr<1)
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306 | {
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307 | send[ctr]=UART4->RDR;
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308 | ctr++;
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309 | //opc(send[0]);
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310 | }
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311 |
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312 | else if(ctr<max_wordlength)
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313 | {
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314 | send[ctr]=UART4->RDR;
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315 | ctr++;
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316 | }
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317 |
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318 | else
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319 | {
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320 |
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321 | for(ctr=0;ctr<max_wordlength;ctr++){send[ctr]=0;}
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322 | ctr=0;
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323 | send[ctr]=UART4->RDR;
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324 | ctr++;
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325 | }
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326 | }
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327 | }
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328 | void UART4_String(char*string)//write a String in the Transmit Data Register
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329 |
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330 | { int laenge=sizeof(string);
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331 | int i=0;
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332 | while(i<=(laenge+1)){
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333 | UART4_PutChar(string[i]);
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334 | i++;
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335 | }
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336 |
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337 |
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338 |
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339 | }
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340 |
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341 |
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342 | void UART5_Init(void)
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343 |
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344 | {
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345 |
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346 |
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347 | RCC->APB1RSTR |= RCC_APB1RSTR_UART5RST;//Uart5 Reset
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348 | RCC->APB1RSTR &= (~RCC_APB1RSTR_UART5RST);
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349 | RCC->AHBENR |= RCC_AHBENR_GPIOCEN; //GPIOC Clock Enable
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350 | RCC->AHBENR |= RCC_AHBENR_GPIODEN; //GPIOD Clock Enable
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351 | RCC->APB1ENR |= RCC_APB1ENR_UART5EN;//UART5 Clock Enable
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352 | RCC->CFGR3 |= RCC_CFGR3_UART5SW_0;//System clock (SYSCLK) selected as UART5 clock
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353 | RCC->CFGR3 &= ~RCC_CFGR3_UART5SW_1;
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354 |
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355 | GPIOC->MODER |=GPIO_MODER_MODER12_1 ;//p10(TX)&p11(RX) Alternative function mode
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356 | GPIOC->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR12_0|GPIO_OSPEEDER_OSPEEDR10_1;//50MHz
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357 | GPIOC->AFR[1] |= 0x00000800|0x00000080; //afr8
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358 |
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359 | GPIOD->MODER |=GPIO_MODER_MODER2_1;//p10(TX)&p11(RX) Alternative function mode
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360 | GPIOD->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR2_0|GPIO_OSPEEDER_OSPEEDR2_1;//50MHz
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361 | GPIOD->AFR[1] |= 0x00000800|0x00000080; //afr8
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362 |
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363 |
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364 | UART5->BRR = (SystemCoreClock / 9600);//Baudrate 9600
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365 | UART5->CR1 |= USART_CR1_UE;//Usart enable
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366 | UART5->CR1 |= USART_CR1_TE |USART_CR1_RE|USART_CR1_RXNEIE ;//Receive & Transmit enable
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367 | NVIC_EnableIRQ(UART5_IRQn);
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368 |
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369 |
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370 |
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371 | }
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372 | void UART5_PutChar(uint8_t ch)//write a character in the Transmit Data Register
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373 |
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374 | {
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375 |
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376 | while(!(UART5->ISR & USART_ISR_TXE));
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377 |
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378 | UART5->TDR = ch;
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379 |
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380 | }
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381 |
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382 |
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383 | void UART5_IRQHandler (void)
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384 |
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385 | {
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386 |
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387 | if(UART5->ISR & USART_ISR_RXNE){
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388 |
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389 | if(ctr<1)
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390 | {
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391 | send[ctr]=UART5->RDR;
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392 | ctr++;
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393 | //opc(send[0]);
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394 | }
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395 |
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396 | else if(ctr<max_wordlength)
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397 | {
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398 | send[ctr]=UART5->RDR;
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399 | ctr++;
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400 |
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401 |
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402 | }
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403 |
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404 | else
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405 | {
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406 |
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407 | for(ctr=0;ctr<max_wordlength;ctr++){send[ctr]=0;}
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408 | ctr=0;
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409 | send[ctr]=UART5->RDR;
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410 | ctr++;
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411 | }
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412 | }
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413 | }
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414 | void UART5_String(char*string)//write a String in the Transmit Data Register
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415 |
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416 | { int laenge=sizeof(string);
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417 | int i=0;
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418 | while(i<=(laenge+1)){
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419 | UART5_PutChar(string[i]);
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420 | i++;
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421 | }
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422 |
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423 |
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424 |
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425 | }
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