1 | #include <msp430.h>
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2 |
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3 | int value;
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4 |
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5 | int main(void) {
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6 |
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7 | WDTCTL = WDTPW | WDTHOLD; // Stop WDT
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8 |
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9 | // GPIO Setup
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10 | P1OUT &= ~BIT0; // LED2 aus
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11 | P1DIR |= BIT0; // P1.0/LED2 als Ausgang
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12 | P4OUT &= ~BIT6; // LED1 aus
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13 | P4DIR |= BIT6; // P4.6/LED1 als Ausgang
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14 | P4SEL1 |= BIT2; // P4.2 als ADC Eingang A10
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15 | P4SEL0 |= BIT2;
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16 |
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17 | PJOUT = 0; // Setup XT1
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18 | PJSEL0 = BIT4 | BIT5;
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19 | PJDIR = 0xFFFF;
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20 |
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21 | PM5CTL0 &= ~LOCKLPM5;
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22 |
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23 | // XT1 Setup
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24 | CSCTL0_H = CSKEY >> 8; // Unlock CS registers
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25 | CSCTL1 = DCOFSEL_0; // Set DCO to 1MHz
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26 | CSCTL2 = SELA__LFXTCLK | SELS__DCOCLK | SELM__DCOCLK;
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27 | CSCTL3 = DIVA__1 | DIVS__1 | DIVM__1; // Set all dividers to 1
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28 | CSCTL4 &= ~LFXTOFF; // Enable LFXT1
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29 | do {
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30 | CSCTL5 &= ~LFXTOFFG; // Clear XT1 fault flag
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31 | SFRIFG1 &= ~OFIFG;
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32 | } while (SFRIFG1&OFIFG); // Test oscillator fault flag
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33 | CSCTL0_H = 0; // Lock CS registers
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34 |
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35 | // Configure ADC12
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36 | ADC12CTL0 &= ~ADC12ENC; // disable ADC12
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37 | ADC12CTL0 = ADC12ON; // ADC12 on
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38 | ADC12CTL1 = ADC12SHS_1; // TA0CCR1 als SHS
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39 | ADC12CTL2 = ADC12RES_1; // 10-bit Auflösung + Low Power Mode
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40 | ADC12MCTL0 = ADC12WINC | ADC12INCH_10; // Window Comparator + A10 als Input
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41 | ADC12HI = 0x300; // Oberer Threshold 3/4 VDD
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42 | ADC12LO = 0x100; // Unterer Threshold = 1/4 VDD
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43 | ADC12IER0 = ADC12IE0; // enable conversion complete Interrupt für ADC12MEM0
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44 | ADC12IER2 = ADC12OVIE | ADC12HIIE; // enable Interrupt für oberen und unteren Threshold des Window Comparators
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45 |
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46 | // Configure Timer_A
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47 | TA0CTL = TASSEL_1 + MC_1; // ACLK + Up-Mode
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48 | TA0CCTL0 = CCIE; // enable Interrupt
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49 | TA0CCTL1 = OUTMOD_3; // PWM Set/Reset
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50 | TA0CCR0 = 4; // Periode setzen -> 32768/4 = 8192 Messwerte pro Sekunde
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51 | TA0CCR1 = 1; // Sample-and-hold Dauer 4 - 1 = 3 Takte => ca. 90µS
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52 | __bis_SR_register(LPM3_bits + GIE); // LPM3 + globale Interrupts aktiv
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53 | }
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54 |
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55 | #pragma vector = ADC12_VECTOR
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56 | __interrupt void ADC12_ISR(void) {
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57 | switch(__even_in_range(ADC12IV, ADC12IV_ADC12RDYIFG)) {
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58 | case ADC12IV_NONE: break; // Vector 0: No interrupt
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59 | case ADC12IV_ADC12OVIFG: break; // Vector 2: ADC12MEMx Overflow
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60 | case ADC12IV_ADC12TOVIFG: break; // Vector 4: Conversion time overflow
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61 | case ADC12IV_ADC12HIIFG: // Vector 6: ADC12BHI
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62 | ADC12IFGR2 &= ~ADC12HIIFG; // Clear Interrupt Flag
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63 | P1OUT |= BIT0; // LED2 on
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64 | break;
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65 | case ADC12IV_ADC12LOIFG: // Vector 8: ADC12BLO
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66 | ADC12IFGR2 &= ~ADC12LOIFG; // Clear Interrupt Flag
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67 | P1OUT &= ~BIT0; // LED2 off
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68 | break;
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69 | case ADC12IV_ADC12INIFG: break; // Vector 10: ADC12BIN
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70 | case ADC12IV_ADC12IFG0: ADC12CTL0 &= ~ADC12ENC; // Disable ADC12
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71 | P4OUT ^= BIT6; // Toggle LED1
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72 | value = ADC12MEM0;
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73 | break;
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74 | case ADC12IV_ADC12IFG1: break; // Vector 14: ADC12MEM1
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75 | case ADC12IV_ADC12IFG2: break; // Vector 16: ADC12MEM2
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76 | case ADC12IV_ADC12IFG3: break; // Vector 18: ADC12MEM3
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77 | case ADC12IV_ADC12IFG4: break; // Vector 20: ADC12MEM4
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78 | case ADC12IV_ADC12IFG5: break; // Vector 22: ADC12MEM5
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79 | case ADC12IV_ADC12IFG6: break; // Vector 24: ADC12MEM6
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80 | case ADC12IV_ADC12IFG7: break; // Vector 26: ADC12MEM7
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81 | case ADC12IV_ADC12IFG8: break; // Vector 28: ADC12MEM8
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82 | case ADC12IV_ADC12IFG9: break; // Vector 30: ADC12MEM9
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83 | case ADC12IV_ADC12IFG10: break; // Vector 32: ADC12MEM10
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84 | case ADC12IV_ADC12IFG11: break; // Vector 34: ADC12MEM11
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85 | case ADC12IV_ADC12IFG12: break; // Vector 36: ADC12MEM12
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86 | case ADC12IV_ADC12IFG13: break; // Vector 38: ADC12MEM13
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87 | case ADC12IV_ADC12IFG14: break; // Vector 40: ADC12MEM14
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88 | case ADC12IV_ADC12IFG15: break; // Vector 42: ADC12MEM15
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89 | case ADC12IV_ADC12IFG16: break; // Vector 44: ADC12MEM16
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90 | case ADC12IV_ADC12IFG17: break; // Vector 46: ADC12MEM17
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91 | case ADC12IV_ADC12IFG18: break; // Vector 48: ADC12MEM18
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92 | case ADC12IV_ADC12IFG19: break; // Vector 50: ADC12MEM19
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93 | case ADC12IV_ADC12IFG20: break; // Vector 52: ADC12MEM20
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94 | case ADC12IV_ADC12IFG21: break; // Vector 54: ADC12MEM21
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95 | case ADC12IV_ADC12IFG22: break; // Vector 56: ADC12MEM22
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96 | case ADC12IV_ADC12IFG23: break; // Vector 58: ADC12MEM23
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97 | case ADC12IV_ADC12IFG24: break; // Vector 60: ADC12MEM24
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98 | case ADC12IV_ADC12IFG25: break; // Vector 62: ADC12MEM25
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99 | case ADC12IV_ADC12IFG26: break; // Vector 64: ADC12MEM26
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100 | case ADC12IV_ADC12IFG27: break; // Vector 66: ADC12MEM27
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101 | case ADC12IV_ADC12IFG28: break; // Vector 68: ADC12MEM28
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102 | case ADC12IV_ADC12IFG29: break; // Vector 70: ADC12MEM29
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103 | case ADC12IV_ADC12IFG30: break; // Vector 72: ADC12MEM30
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104 | case ADC12IV_ADC12IFG31: break; // Vector 74: ADC12MEM31
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105 | case ADC12IV_ADC12RDYIFG: break; // Vector 76: ADC12RDY
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106 | default: break;
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107 | }
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108 | }
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109 |
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110 | // Timer A0 interrupt service routine
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111 | #pragma vector=TIMER0_A0_VECTOR
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112 | __interrupt void Timer_A(void)
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113 | {
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114 | ADC12CTL0 |= ADC12ENC; // ADC10 enable set
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115 | }
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