1 | #include <avr/io.h>
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2 | #include <avr/interrupt.h>
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3 |
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4 | // UART0
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5 | #define UART0_BAUD 9600UL
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6 | #define UART0_UBRR_VAL ((F_CPU+UART0_BAUD*8)/(UART0_BAUD*16)-1)
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7 | #define UART0_BAUD_REAL (F_CPU/(16*(UART0_UBRR_VAL+1)))
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8 | #define UART0_BAUD_ERROR ((UART0_BAUD_REAL*1000)/UART0_BAUD)
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9 |
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10 | #if ((UART0_BAUD_ERROR<990) || (UART0_BAUD_ERROR>1010))
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11 | #error Systematischer Fehler der Baudrate(UART0) groesser 1% und damit zu hoch!
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12 | #endif
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13 |
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14 | void uart0_init(void)
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15 | {
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16 | UBRR0 = UART0_UBRR_VAL;
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17 | UCSR0B |= (1 << TXEN0);
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18 | UCSR0C = (1 << UCSZ01) | (1 << UCSZ00);
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19 | }
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20 |
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21 | int uart0_putc(uint8_t c)
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22 | {
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23 | while(!(UCSR0A & (1<<UDRE0))) {}
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24 |
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25 | UDR0 = c;
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26 | return 0;
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27 | }
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28 |
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29 | void uart0_puts (char *s)
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30 | {
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31 | while (*s)
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32 | {
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33 | uart0_putc(*s);
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34 | s++;
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35 | }
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36 | }
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37 |
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38 | // UART1
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39 | #define UART1_BAUD 9600UL
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40 | #define UART1_UBRR_VAL ((F_CPU+UART1_BAUD*8)/(UART1_BAUD*16)-1)
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41 | #define UART1_BAUD_REAL (F_CPU/(16*(UART1_UBRR_VAL+1)))
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42 | #define UART1_BAUD_ERROR ((UART1_BAUD_REAL*1000)/UART1_BAUD)
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43 |
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44 | #if ((UART1_BAUD_ERROR<990) || (UART1_BAUD_ERROR>1010))
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45 | #error Systematischer Fehler der Baudrate(UART1) groesser 1% und damit zu hoch!
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46 | #endif
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47 |
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48 | void uart1_init(void)
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49 | {
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50 | UBRR1 = UART1_UBRR_VAL;
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51 | UCSR1B |= (1 << TXEN1);
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52 | UCSR1C = (1 << UCSZ11) | (1 << UCSZ10);
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53 | }
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54 |
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55 | int uart1_putc(uint8_t c)
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56 | {
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57 | while(!(UCSR1A & (1<<UDRE1))) {}
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58 |
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59 | UDR1 = c;
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60 | return 0;
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61 | }
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62 |
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63 | void uart1_puts (char *s)
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64 | {
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65 | while (*s)
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66 | {
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67 | uart1_putc(*s);
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68 | s++;
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69 | }
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70 | }
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71 |
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72 |
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73 | volatile uint32_t _millis;
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74 | volatile uint32_t millis;
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75 | volatile uint16_t second;
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76 |
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77 | ISR(TIMER0_COMPA_vect)
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78 | {
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79 | _millis++;
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80 | millis++;
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81 |
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82 | if(millis == 1000)
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83 | {
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84 | second++;
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85 | millis = 0;
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86 | }
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87 | }
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88 |
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89 |
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90 | int main(void)
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91 | {
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92 | // UART
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93 | uart0_init();
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94 | uart1_init();
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95 |
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96 | // millis
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97 | TCCR0A = (1 << WGM01); // CTC Modus
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98 | TCCR0B |= (1 << CS01) | (1 << CS00); // Prescaler 64
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99 | OCR0A = 124; // (F_CPU/PRESCALER)/1000-1
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100 | TIMSK0 |= (1 << OCIE0A); // Compare Interupt erlauben
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101 | sei();
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102 |
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103 | while(1)
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104 | {
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105 | static uint16_t last_second;
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106 | if(last_second != second)
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107 | {
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108 | last_second = second;
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109 |
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110 | char str[10];
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111 | uart0_puts("UART0 >> ");
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112 | itoa(second, str, 10);
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113 | uart0_puts(str);
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114 | uart0_puts("\n\r");
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115 |
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116 |
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117 | uart1_puts("UART1 >> ");
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118 | itoa(second, str, 10);
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119 | uart1_puts(str);
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120 | uart1_puts("\n\r");
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121 | }
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122 | }
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123 | }
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