1 | ;-----------------------------------------------------------------------------
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2 | ;* Switcher for ATtiny10 and Bluetooth loop
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3 | ;*
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4 | ;* PB0 = Button
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5 | ;* PB1 = ADC connected to 1.8V Pin12 XS3868 (reference for ADC is Vcc = Vbatt of LiIon)
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6 | ;* < 3,0V should be a ADC value > 154. Use 150 for security
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7 | ;* PB2 = Gate mosfet, 0 = switch on the BT and amplifier!
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8 | ;* PB3 = Status LED + Tx to bluetooth module
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9 | ;*
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10 | ;* off= 8uA, on 0.97mA 5V
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11 | ;* off= 5uA, on 0.60mA 3V3
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12 | ;-----------------------------------------------------------------------------
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13 |
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14 | .include "tn10def.inc"
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15 |
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16 | .org 0
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17 | rjmp RESET ; Reset Handler
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18 | rjmp INT0 ; IRQ0 Handler
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19 | rjmp PCINT0 ; PCINT0 Handler
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20 | rjmp TIM0_CAPT ; Timer0 Capture Handler
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21 | rjmp TIM0_OVF ; Timer0 Overflow Handler
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22 | rjmp TIM0_COMPA ; Timer0 Compare A Handler
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23 | rjmp TIM0_COMPB ; Timer0 Compare B Handler
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24 | rjmp ANA_COMP ; Analog Comparator Handler
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25 | rjmp WDT ; Watchdog Interrupt Handler
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26 | rjmp VLM ; Voltage Level Monitor Handler
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27 | rjmp ADCCH ; ADC Conversion Handle
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28 |
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29 |
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30 | ; defines + equ
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31 | ;-----------------------------------------------------------------------------
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32 | .def save_sreg = r16
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33 | .def iwr0 = r17
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34 | .def iwr1 = r18
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35 |
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36 | .def key_old = r19
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37 | .def key_state = r20
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38 | .def key_press = r21
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39 |
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40 | .def rTEMP = r22
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41 | .def adc_value = r23
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42 |
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43 | ; IRQs
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44 | ;-----------------------------------------------------------------------------
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45 |
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46 | TIM0_COMPA: ; IRQ Timer0 compare match A
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47 | in save_sreg, SREG
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48 |
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49 | ; Timer-Verfahren (nach Peter Dannegger): http://www.mikrocontroller.net/articles/Entprellung
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50 | get8key: ;/old state iwr1 iwr0
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51 | mov iwr0, key_old ;00110011 10101010 00110011
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52 | in key_old, PINB ;11110000
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53 | eor iwr0, key_old ; 11000011
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54 | com key_old ;00001111
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55 | mov iwr1, key_state ; 10101010
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56 | or key_state, iwr0 ; 11101011
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57 | and iwr0, key_old ; 00000011
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58 | eor key_state, iwr0 ; 11101000
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59 | and iwr1, iwr0 ; 00000010
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60 | or key_press, iwr1 ;store key press detect
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61 | out SREG, save_sreg
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62 | reti
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63 |
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64 | ADCCH:
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65 | in adc_value, ADCL
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66 | reti
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67 |
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68 |
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69 | ; not used IRQs
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70 | TIM0_CAPT:
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71 | TIM0_OVF:
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72 | TIM0_COMPB:
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73 | ANA_COMP:
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74 | reti
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75 |
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76 | ;-----------------------------------------------------------------------------
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77 |
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78 | ; Start, Power On, Reset
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79 | RESET:
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80 | WDT:
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81 | VLM:
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82 | ; initialize SP
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83 | ldi rTEMP, HIGH(RAMEND)
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84 | out SPH, rTEMP
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85 | ldi rTEMP, LOW(RAMEND)
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86 | out SPL, rTEMP
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87 |
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88 | rcall SetLowClock
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89 |
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90 | sbi ACSR, ACD ; disable AC
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91 |
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92 | ; set ADC clock dividier to 8, irq on, auto trigger, free running in ADCSRB is default
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93 | ldi rTemp, 1<<ADPS0 | 1<<ADPS1 | ADIE | ADATE
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94 | out ADCSRA, rTemp
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95 | sbi DIDR0, ADC1D ; deactivate digital input PB1 (1V8)
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96 | sbi ADMUX, MUX0 ; set AD mux to PB1 (1V8)
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97 | cbi ADCSRA, ADEN ; disable ACD
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98 | ldi rTEMP, 1<<PRADC
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99 | out PRR, rTEMP ; shut down ACD
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100 |
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101 | ldi rTEMP, 1<<PB2
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102 | out DDRB, rTEMP ; Out -> Mosfet (-> BT)
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103 |
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104 | sbi PUEB, PUEB0 ; Pullup an PB0 (Button)
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105 |
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106 | ldi rTEMP, 1<<OCIE0A ; enable timer compare A interrupt
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107 | out TIMSK0, rTEMP
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108 |
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109 | clr key_old
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110 | clr key_state
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111 | clr key_press
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112 |
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113 | sbi PORTB, PB2 ; switch BT off
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114 |
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115 |
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116 | mainloop:
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117 | cli
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118 | sbis PORTB, PB2
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119 | rjmp status_on
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120 |
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121 | status_off:
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122 | rjmp check_key
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123 |
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124 | status_on:
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125 | mov rTEMP, adc_value ; check battery
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126 | sbci rTEMP, 150
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127 | brcc switch_to_off ; low battery
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128 |
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129 | check_key:
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130 | sbrs key_press, PB0 ; skip the next if key 0 is pressed
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131 | rjmp endloop
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132 |
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133 | clr key_press ; clear, if key press action done
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134 | sei
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135 | sbis PORTB, PB2
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136 | rjmp switch_to_off
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137 |
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138 | switch_to_on: ; actual status is off
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139 | cbi PORTB, PB2 ; switch BT on (out is GND)
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140 | rcall SetHighClock
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141 |
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142 | ldi rTemp, 0
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143 | out PRR, rTemp ; power on ACD (+ Timer/Counter)
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144 | sbi ADCSRA, ADEN ; enable ACD
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145 | sbi ADCSRA, ADSC ; start first ADC conversion
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146 |
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147 | rjmp endloop
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148 |
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149 | switch_to_off: ; actual status is on
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150 | sbi PORTB, PB2 ; switch BT off (out is Vcc)
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151 | rcall SetLowClock
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152 |
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153 | cbi ADCSRA, ADEN ; disable ACD
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154 | ldi rTemp, 1<<PRADC
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155 | out PRR, rTemp ; shut down ACD
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156 |
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157 | endloop:
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158 | clr key_press ; clear, if key press action done
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159 | sei
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160 | sleep
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161 | rjmp mainloop
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162 |
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163 | ; set clock to 500Hz
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164 | SetLowClock:
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165 | ldi rTEMP, 0xD8
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166 | out CCP, rTEMP ; Configuration Change Protection Register
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167 | ldi rTEMP, 0x01 ; Clock source 128kHz
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168 | out CLKMSR, rTEMP
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169 |
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170 | ; Clock dividier 256
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171 | ldi rTEMP, 0xD8
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172 | out CCP, rTEMP ; Configuration Change Protection Register
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173 | ldi rTEMP, 1<<CLKPS3 ; Clk / 256 -> Clock 500Hz
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174 | out CLKPSR, rTEMP
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175 |
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176 | ldi rTEMP, 1<<CS00 | 1<<WGM02 ; clock divide by 1 + CTC mode A
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177 | out TCCR0B, rTEMP
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178 |
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179 | ldi rTEMP, 0x00
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180 | out OCR0AH, rTEMP
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181 | ldi rTEMP, 0x80
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182 | out OCR0AL, rTEMP ; load timer with 0x80FF
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183 | ret
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184 |
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185 | ;Set clock to 1MHz
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186 | SetHighClock:
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187 | ldi rTEMP, 0xD8
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188 | out CCP, rTEMP ; Configuration Change Protection Register
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189 | ldi rTEMP, 0x00 ; Clock source 8MHz
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190 | out CLKMSR, rTEMP
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191 |
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192 | ; Clock dividier 8
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193 | ldi rTEMP, 0xD8
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194 | out CCP, rTEMP ; Configuration Change Protection Register
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195 | ldi rTEMP, 1<<CLKPS0 | 1<<CLKPS1 ; Clk / 8 -> Clock 1 MHz
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196 | out CLKPSR, rTEMP
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197 |
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198 | ldi rTEMP, 1<<CS00 | 1<<CS02 | 1<<WGM02 ; clock divide by 1024 + CTC mode A
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199 | out TCCR0B, rTEMP
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200 |
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201 | ldi rTEMP, 0x01
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202 | out OCR0AH, rTEMP
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203 | ldi rTEMP, 0x00
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204 | out OCR0AL, rTEMP ; load timer with 0x100FF (for 1MHz / 1024)
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205 | ret
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