1 | // PIC24F16KA101 Configuration Bit Settings
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2 |
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3 | // 'C' source line config statements
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4 |
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5 | #include <xc.h>
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6 |
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7 | // FBS
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8 | #pragma config BWRP = OFF // Table Write Protect Boot (Boot segment may be written)
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9 | #pragma config BSS = OFF // Boot segment Protect (No boot program Flash segment)
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10 |
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11 | // FGS
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12 | #pragma config GWRP = OFF // General Segment Code Flash Write Protection bit (General segment may be written)
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13 | #pragma config GCP = OFF // General Segment Code Flash Code Protection bit (No protection)
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14 |
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15 | // FOSCSEL
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16 | #pragma config FNOSC = PRI // Oscillator Select (Primary oscillator (XT, HS, EC))
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17 | #pragma config IESO = ON // Internal External Switch Over bit (Internal External Switchover mode enabled (Two-Speed Start-up enabled))
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18 |
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19 | // FOSC
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20 | #pragma config POSCMOD = HS // Primary Oscillator Configuration bits (HS oscillator mode selected)
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21 | #pragma config OSCIOFNC = OFF // CLKO Enable Configuration bit (CLKO output signal is active on the OSCO pin)
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22 | #pragma config POSCFREQ = MS // Primary Oscillator Frequency Range Configuration bits (Primary oscillator/external clock input frequency between 100 kHz and 8 MHz)
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23 | #pragma config SOSCSEL = SOSCHP // SOSC Power Selection Configuration bits (Secondary oscillator configured for high-power operation)
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24 | #pragma config FCKSM = CSDCMD // Clock Switching and Monitor Selection (Both Clock Switching and Fail-safe Clock Monitor are disabled)
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25 |
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26 | // FWDT
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27 | #pragma config WDTPS = PS32768 // Watchdog Timer Postscale Select bits (1:32,768)
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28 | #pragma config FWPSA = PR128 // WDT Prescaler (WDT prescaler ratio of 1:128)
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29 | #pragma config WINDIS = OFF // Windowed Watchdog Timer Disable bit (Standard WDT selected; windowed WDT disabled)
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30 | #pragma config FWDTEN = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
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31 |
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32 | // FPOR
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33 | #pragma config BOREN = BOR3 // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware; SBOREN bit disabled)
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34 | #pragma config PWRTEN = ON // Power-up Timer Enable bit (PWRT enabled)
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35 | #pragma config I2C1SEL = PRI // Alternate I2C1 Pin Mapping bit (Default location for SCL1/SDA1 pins)
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36 | #pragma config BORV = V18 // Brown-out Reset Voltage bits (Brown-out Reset set to lowest voltage (1.8V))
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37 | #pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RA5 input pin disabled)
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38 |
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39 | // FICD
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40 | #pragma config ICS = PGx3 // ICD Pin Placement Select bits (PGC3/PGD3 are used for programming and debugging the device)
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41 |
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42 | // FDS
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43 | #pragma config DSWDTPS = DSWDTPSF // Deep Sleep Watchdog Timer Postscale Select bits (1:2,147,483,648 (25.7 Days))
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44 | #pragma config DSWDTOSC = LPRC // DSWDT Reference Clock Select bit (DSWDT uses LPRC as reference clock)
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45 | #pragma config RTCOSC = SOSC // RTCC Reference Clock Select bit (RTCC uses SOSC as reference clock)
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46 | #pragma config DSBOREN = ON // Deep Sleep Zero-Power BOR Enable bit (Deep Sleep BOR enabled in Deep Sleep)
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47 | #pragma config DSWDTEN = ON // Deep Sleep Watchdog Timer Enable bit (DSWDT enabled)
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