ext. SPI EEPROM

Steht doch im Datenblatt:
"HOLD: The HOLD pin is used in conjunction with the CS pin to select the
AT25128A/256A. When the device is selected and a serial sequence is 
underway,
HOLD can be used to pause the serial communication with the master 
device without
resetting the serial sequence. To pause, the HOLD pin must be brought 
low while the
SCK pin is low. To resume serial communication, the HOLD pin is brought 
high while the
SCK pin is low (SCK may still toggle during HOLD). Inputs to the SI pin 
will be ignored
while the SO pin is in the high impedance state.
WRITE PROTECT: The write protect pin (WP) will allow normal read/write 
operations
when held high. When the WP pin is brought low and WPEN bit is “1”, all 
write operations
to the status register are inhibited. WP going low while CS is still low 
will interrupt a
write to the status register. If the internal write cycle has already 
been initiated, WP
going low will have no effect on any write operation to the status 
register. The WP pin
function is blocked when the WPEN bit in the status register is “0”. 
This will allow the
user to install the AT25128A/256A in a system with the WP pin tied to 
ground and still be
able to write to the status register. All WP pin functions are enabled 
when the WPEN bit
is set to “1”."