1 | #define F_CPU 20000000
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2 | #define DEVICE_ADDRESS 0x01
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3 | #include <avr/io.h>
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4 | #include <stdint.h>
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5 | #include <util/delay.h>
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6 | #include <avr/interrupt.h>
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7 | #define VPRG PORTA0
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8 | #define SIN PORTA1
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9 | #define SCLK PORTA2
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10 | #define XLAT PORTA3
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11 | #define BLANK PORTA4
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12 | #define DCPRG PORTA5
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13 | #define GSCLK PORTA6
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14 | #define XERR PORTA7
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15 |
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16 | volatile uint8_t refresh;
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17 | volatile uint8_t trigger;
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18 | uint8_t DCvalues[80];
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19 | uint16_t PWMvalues[80];
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20 | uint8_t ValueMap[80][100];
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21 | uint8_t ControlMap[30][100];
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22 | uint8_t Patch[80];
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23 | uint16_t Curve[256];
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24 |
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25 | void Scycle(void)
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26 | {
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27 | PORTA |= (1 << SCLK);
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28 | PORTA &= ~(1 << SCLK);
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29 | }
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30 |
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31 | void Xcycle(void)
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32 | {
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33 | PORTA |= (1 << XLAT);
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34 | PORTA &= ~(1 << XLAT);
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35 | }
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36 |
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37 |
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38 |
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39 |
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40 | void SendPWM(uint16_t x)
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41 | {
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42 | if(x & 0b0000100000000000){PORTA |= (1 << SIN);}
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43 | else{PORTA &= ~(1 << SIN);}
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44 | Scycle();
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45 | if(x & 0b0000010000000000){PORTA |= (1 << SIN);}
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46 | else{PORTA &= ~(1 << SIN);}
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47 | Scycle();
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48 | if(x & 0b0000001000000000){PORTA |= (1 << SIN);}
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49 | else{PORTA &= ~(1 << SIN);}
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50 | Scycle();
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51 | if(x & 0b0000000100000000){PORTA |= (1 << SIN);}
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52 | else{PORTA &= ~(1 << SIN);}
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53 | Scycle();
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54 | if(x & 0b0000000010000000){PORTA |= (1 << SIN);}
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55 | else{PORTA &= ~(1 << SIN);}
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56 | Scycle();
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57 | if(x & 0b0000000001000000){PORTA |= (1 << SIN);}
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58 | else{PORTA &= ~(1 << SIN);}
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59 | Scycle();
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60 | if(x & 0b0000000000100000){PORTA |= (1 << SIN);}
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61 | else{PORTA &= ~(1 << SIN);}
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62 | Scycle();
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63 | if(x & 0b0000000000010000){PORTA |= (1 << SIN);}
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64 | else{PORTA &= ~(1 << SIN);}
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65 | Scycle();
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66 | if(x & 0b0000000000001000){PORTA |= (1 << SIN);}
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67 | else{PORTA &= ~(1 << SIN);}
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68 | Scycle();
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69 | if(x & 0b0000000000000100){PORTA |= (1 << SIN);}
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70 | else{PORTA &= ~(1 << SIN);}
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71 | Scycle();
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72 | if(x & 0b0000000000000010){PORTA |= (1 << SIN);}
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73 | else{PORTA &= ~(1 << SIN);}
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74 | Scycle();
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75 | if(x & 0b0000000000000001){PORTA |= (1 << SIN);}
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76 | else{PORTA &= ~(1 << SIN);}
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77 | Scycle();
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78 | }
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79 |
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80 | void ProgPWM(void)
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81 | {
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82 | int i;
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83 | for(i=0;i<80;i++){SendPWM(PWMvalues[i]);}
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84 | Xcycle();
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85 | }
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86 |
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87 |
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88 | void SendDC(uint8_t x)
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89 | {
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90 | if(x & 0b00100000){PORTA |= (1 << SIN);}
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91 | else{PORTA &= ~(1 << SIN);}
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92 | Scycle();
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93 | if(x & 0b00010000){PORTA |= (1 << SIN);}
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94 | else{PORTA &= ~(1 << SIN);}
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95 | Scycle();
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96 | if(x & 0b00001000){PORTA |= (1 << SIN);}
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97 | else{PORTA &= ~(1 << SIN);}
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98 | Scycle();
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99 | if(x & 0b00000100){PORTA |= (1 << SIN);}
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100 | else{PORTA &= ~(1 << SIN);}
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101 | Scycle();
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102 | if(x & 0b00000010){PORTA |= (1 << SIN);}
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103 | else{PORTA &= ~(1 << SIN);}
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104 | Scycle();
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105 | if(x & 0b00000001){PORTA |= (1 << SIN);}
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106 | else{PORTA &= ~(1 << SIN);}
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107 | Scycle();
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108 | }
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109 |
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110 |
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111 |
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112 | void ProgDC(void)
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113 | {
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114 | int i;
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115 | PORTA |= (1 << VPRG);for(i=0;i<80;i++){SendDC(DCvalues[i]);}
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116 | Xcycle();
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117 | PORTA &= ~(1 << VPRG);
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118 | }
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119 |
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120 | uint8_t CalcOutput(uint8_t frameval,uint8_t preframeval,uint8_t fadeval)
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121 | {
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122 | uint16_t v1 = (uint16_t)frameval*fadeval/255;
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123 | uint16_t v2 = (uint16_t)preframeval*(255-fadeval)/255;
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124 | uint16_t v5 = v1+v2;
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125 | if(v5 > 255){return 255;}
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126 | else{return v5;}
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127 | //return frameval;
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128 | }
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129 | void OutputData(uint8_t frameA, uint8_t frameB,uint8_t frameC,uint8_t frameD,uint8_t preframeA, uint8_t preframeB,uint8_t preframeC,uint8_t preframeD,uint8_t fadecounterA, uint8_t fadecounterB,uint8_t fadecounterC,uint8_t fadecounterD)
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130 | {
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131 | int i;
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132 | for(i=0;i<32;i++){PWMvalues[Patch[i]] = Curve[CalcOutput(ValueMap[i][frameA],ValueMap[i][preframeA],fadecounterA)];}
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133 | for(i=32;i<64;i++){PWMvalues[Patch[i]] = Curve[CalcOutput(ValueMap[i][frameB],ValueMap[i][preframeB],fadecounterB)];}
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134 | for(i=64;i<68;i++){PWMvalues[Patch[i]] = Curve[CalcOutput(ValueMap[i][frameC],ValueMap[i][preframeC],fadecounterC)];}
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135 | for(i=68;i<80;i++){PWMvalues[Patch[i]] = Curve[CalcOutput(ValueMap[i][frameD],ValueMap[i][preframeD],fadecounterD)];}
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136 | ProgPWM();
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137 | }
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138 | int main(void)
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139 | {
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140 | DDRA = 0xff;
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141 | DDRB =0xff;
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142 | DDRC = 0xFF;
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143 | PORTC = (1 << 4);
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144 | DDRA &= ~(1 << XERR);
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145 | PORTA = (0 << VPRG) | (0 << SIN)| (0 << SCLK)| (0 << XLAT)| (1 << BLANK)| (1 << DCPRG)| (0 << GSCLK);
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146 | int i;
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147 | for(i=0;i<256;i++){Curve[i] = i;}
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148 | for(i=0;i<80;i++){Patch[i] = i;}
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149 | for(i=0;i<80;i++){DCvalues[i] = 10;}
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150 | int j;
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151 | for(i=0;i<80;i++){for(j=0;j<100;j++){ValueMap[i][j] = (j%2)*255;}}
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152 | for(i=0;i<4;i++){for(j=0;j<100;j++){ControlMap[i][j] = 64;}}//TriggerTime
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153 | for(i=4;i<8;i++){for(j=0;j<100;j++){ControlMap[i][j] = 1;}} //FadeAmmount
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154 | for(i=8;i<12;i++){for(j=0;j<100;j++){ControlMap[i][j] = 1;}}//TriggerControl
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155 | for(i=12;i<16;i++){for(j=0;j<100;j++){ControlMap[i][j] = 0;}}//LoopControl
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156 | for(i=16;i<20;i++){for(j=0;j<100;j++){ControlMap[i][j] = 0;}}//LoopDestination
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157 | for(i=20;i<24;i++){for(j=0;j<100;j++){ControlMap[i][j] = 0;}}//LoopCounter
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158 | for(i=24;i<28;i++){ControlMap[i][0] = 255;}
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159 | ProgDC();
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160 |
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161 | TCCR0A = (1 << WGM01)|(1<<COM0A0);
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162 | TCCR0B = (1 << CS00);
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163 | OCR0A = 0x01;
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164 | TCCR1B = (1 << CS02) | (1 << WGM12);
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165 | TIMSK1 = (1 << OCIE1A);
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166 | OCR1A = 0x02FF;
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167 | TCCR2A = (1 << WGM21);
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168 | TCCR2B = (1 << CS20)|(1 << CS21)|(1 << CS22);
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169 | TIMSK2 = (1 << OCIE2A);
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170 | OCR2A = 0x04;
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171 | UBRR0L = 64;
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172 | UCSR0C = (1 << UCSZ00)|(1 << UCSZ01);
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173 | UCSR0B = (1 << RXCIE0)|(1 << RXEN0);
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174 | PORTA &= ~(1 << BLANK);
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175 | sei();
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176 | PORTC &= ~(1 << 4);
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177 | PORTC = MCUSR;
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178 | MCUSR = 0;
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179 | while(1)
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180 | {
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181 | if(trigger != 0){refresh = 1;}
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182 | if(trigger == 10){ProgDC();}
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183 | if(refresh == 1){
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184 | //static int c;
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185 | static int framediv;
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186 | static int fc1,fc2,fc3,fc4;
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187 | static int ft1,ft2,ft3,ft4;
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188 | static int pfc1,pfc2,pfc3,pfc4;
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189 | static int fac1,fac2,fac3,fac4;
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190 | framediv++;
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191 | if(framediv == 16)
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192 | {
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193 | ft1++;
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194 | if((ft1 == ControlMap[0][fc1] && ControlMap[8][fc1] == 1)||(ControlMap[8][fc1]==trigger))
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195 | {
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196 | pfc1=fc1;
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197 | if(ControlMap[12][fc1]==0){fc1++;}
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198 | else{
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199 | if(ControlMap[20][fc1] < ControlMap[12][fc1]){
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200 | fc1 = ControlMap[16][fc1];
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201 | ControlMap[20][fc1]++;
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202 | }
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203 | else{
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204 | ControlMap[20][fc1]=0;
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205 | fc1++;
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206 | }
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207 | }
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208 | if((fc1 == 100)|(fc1==ControlMap[24][0])){fc1 = 0;}
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209 | ft1 = 0;
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210 | fac1 = 0;
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211 | }
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212 | ft2++;
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213 | if((ft2 == ControlMap[1][fc2] && ControlMap[9][fc2] == 1)||(ControlMap[9][fc2]==trigger))
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214 | {
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215 | pfc2=fc2;
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216 | if(ControlMap[13][fc2]==0){fc2++;}
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217 | else{
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218 | if(ControlMap[21][fc2] < ControlMap[13][fc2]){
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219 | fc2 = ControlMap[17][fc2];
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220 | ControlMap[21][fc2]++;
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221 | }
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222 | else{
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223 | ControlMap[21][fc2]=0;
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224 | fc2++;
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225 | }
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226 | }
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227 | if((fc2 == 100)|(fc2==ControlMap[25][0])){fc2 = 0;}
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228 | ft2 = 0;
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229 | fac2 = 0;
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230 | }
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231 | ft3++;
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232 | if((ft3 == ControlMap[2][fc3] && ControlMap[10][fc3] == 1)||(ControlMap[10][fc3]==trigger))
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233 | {
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234 | pfc3=fc3;
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235 | if(ControlMap[14][fc3]==0){fc3++;}
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236 | else{
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237 | if(ControlMap[22][fc3] < ControlMap[14][fc3]){
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238 | fc3 = ControlMap[18][fc3];
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239 | ControlMap[22][fc3]++;
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240 | }
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241 | else{
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242 | ControlMap[22][fc3]=0;
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243 | fc3++;
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244 | }
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245 | }
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246 | if((fc3 == 100)|(fc3==ControlMap[26][0])){fc3 = 0;}
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247 | ft3 = 0;
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248 | fac3 = 0;
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249 | }
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250 | ft4++;
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251 | if((ft4 == ControlMap[3][fc4] && ControlMap[11][fc4] == 1)||(ControlMap[11][fc4]==trigger))
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252 | {
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253 | pfc4=fc4;
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254 | if(ControlMap[15][fc4]==0){fc4++;}
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255 | else{
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256 | if(ControlMap[23][fc4] < ControlMap[15][fc4]){
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257 | fc4 = ControlMap[19][fc4];
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258 | ControlMap[23][fc4]++;
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259 | }
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260 | else{
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261 | ControlMap[23][fc4]=0;
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262 | fc4++;
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263 | }
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264 | }
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265 | if((fc4 == 100)|(fc4==ControlMap[27][0])){fc4 = 0;}
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266 | ft4 = 0;
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267 | fac4 = 0;
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268 | }
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269 | framediv = 0;
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270 | //c++;
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271 | }
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272 | if(fac1 + ControlMap[4][fc1] < 255){fac1 += ControlMap[4][fc1];}
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273 | else{fac1 = 255;}
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274 | if(fac2 + ControlMap[5][fc2] < 255){fac2 += ControlMap[5][fc2];}
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275 | else{fac2 = 255;}
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276 | if(fac3 + ControlMap[6][fc3] < 255){fac3 += ControlMap[6][fc3];}
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277 | else{fac3 = 255;}
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278 | if(fac4 + ControlMap[7][fc4] < 255){fac4 += ControlMap[7][fc4];}
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279 | else{fac4 = 255;}
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280 | OutputData(fc1,fc2,fc3,fc4,pfc1,pfc2,pfc3,pfc4,fac1,fac2,fac3,fac4);
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281 | refresh = 0;
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282 | if(trigger != 0){trigger = 0;}
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283 | }
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284 | }
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285 | }
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286 |
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287 | ISR(TIMER2_COMPA_vect)
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288 | {
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289 | PORTA |= (1 << BLANK);
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290 | PORTA &= ~(1 << BLANK);
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291 | }
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292 |
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293 | ISR(TIMER1_COMPA_vect)
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294 | {
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295 | refresh = 1;
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296 | }
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297 |
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298 | void SaveStore(uint8_t mw, uint8_t it, uint8_t t)
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299 | {
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300 | if(mw == 200){if(it < 80){DCvalues[it]=t;}}
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301 | else if(mw == 201){Curve[it]=t;}
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302 | else if(mw == 202){if(it < 80){Patch[it]=t;}}
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303 | else if((mw >= 116) && (mw < 120)){if(it < 80){if(t < 100){Patch[it]=t;}}}
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304 | else if((mw >= 100) && (mw < 128)){if(it < 100){ControlMap[mw-100][it]=t;}}
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305 | else{if(it < 100){ValueMap[mw][it]=t;}}
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306 | }
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307 |
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308 | ISR(USART0__RX_vect)
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309 | {
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310 | static uint8_t uart_status;
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311 | uint8_t temp;
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312 | static uint8_t mem_write_address;
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313 | static uint8_t lenght;
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314 | static uint8_t mem_iter;
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315 | switch(uart_status){
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316 | case 0:
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317 | if(UCSR0A & (1 << FE0)){uart_status = 1;}
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318 | temp = UDR0;
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319 | break;
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320 | case 1:
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321 | temp = UDR0;
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322 | if(temp == 0){uart_status = 2;}
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323 | else{uart_status = 0;}
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324 | break;
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325 | case 2:
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326 | temp = UDR0;
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327 | if(temp == 0){uart_status = 3;}
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328 | else{trigger = temp;uart_status = 0;}
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329 | break;
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330 | case 3:
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331 | temp = UDR0;
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332 | if(temp == DEVICE_ADDRESS){uart_status = 4;}
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333 | else{uart_status = 0;}
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334 | break;
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335 | case 4:
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336 | temp = UDR0;
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337 | mem_write_address = temp;
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338 | uart_status = 5;
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339 | break;
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340 | case 5:
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341 | temp = UDR0;
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342 | lenght = temp;
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343 | mem_iter=0;
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344 | uart_status = 6;
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345 | break;
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346 | case 6:
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347 | temp = UDR0;
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348 | SaveStore(mem_write_address,mem_iter,temp);
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349 | if(mem_iter == lenght){uart_status = 0;}
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350 | mem_iter++;
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351 | break;
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352 | }
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353 | // PORTC = uart_status;
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354 | }
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