PIC teilt Frequenz!

[Franz (Gast)]

Ja hallo ich habe da eine kurze Frage, meinem PIC betreibe ich mit einem 
8 MHz Quarz und wenn ich jetzt eine Zeitschleife laufen lasse dauert sie 
nur halb so lang, kann mir vielleicht jemand sage was ich übersehe.

#include <xc.h>
#define XTAL_FREQ 8000000

// CONFIG1L
#pragma config PLLDIV = 1       // PLL Prescaler Selection bits (No prescale (4 MHz oscillator input drives PLL directly))
#pragma config USBDIV = 1       // USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1) (USB clock source comes directly from the primary oscillator block with no postscale)

// CONFIG1H
#pragma config FOSC = HS        // Oscillator Selection bits (HS oscillator (HS))
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF      // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

z.B. mit dieser Funktion

 __delay_ms(100);

MFG

[chris (Gast)]

guck dir mal die vorteiler an dann weißt du auch warum links im bild

[Franz (Gast)]

Meinst du die Einstellung

CPUDIV

!!!

[chris (Gast)]

wenn du den in BLAU gekennzeichneten meinst denn ja

i denke das prog müsste um

#pragma config CPUDIV = XX

erweitert werden aber das sollte eigentlich im DB stehen in welcher 
grundconfig der PIC die OSCFrequenz teilt wenn diese ANGABE im prog 
fehlt.

[Franz (Gast)]

so habe die config mit reingemacht immer noch das gleiche!!!

 #include <xc.h>
#define XTAL_FREQ 8000000

// CONFIG1L
#pragma config PLLDIV = 1
#pragma config CPUDIV = OSC1_PLL2// PLL Prescaler Selection bits (No prescale (4 MHz oscillator input drives PLL directly))
#pragma config USBDIV = 1       // USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1) (USB clock source comes directly from the primary oscillator block with no postscale)

// CONFIG1H
#pragma config FOSC = HS        // Oscillator Selection bits (HS oscillator (HS))
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF      // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

[Stefan (Gast)]

Welcher PIC ?

[Franz (Gast)]

PIC18F2550!!!

[Patrick B. (p51d)]

Übermässige Ausruffezeichen führen hier auch nicht zum Ziel!
Zeig doch mal den ganzen Code.
Hast du die Zeit mit dem Oszilloskop gemessen oder hast du den Simulator 
genutzt (falls ja, welche Einstellungen?)?

[Franz (Gast)]

•

#include <stdio.h>
#include <stdlib.h>
#include <pic18f2550.h>
#include <delays.h>



// PIC18F2550 Configuration Bit Settings

#include <xc.h>

#define _XTAL_FREQ 8000000

// CONFIG1L
#pragma config PLLDIV = 1
#pragma config CPUDIV = OSC1_PLL2// PLL Prescaler Selection bits (No prescale (4 MHz oscillator input drives PLL directly))
#pragma config USBDIV = 1       // USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1) (USB clock source comes directly from the primary oscillator block with no postscale)

// CONFIG1H
#pragma config FOSC = HS        // Oscillator Selection bits (HS oscillator (HS))
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF      // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

// CONFIG2L
#pragma config PWRT = ON        // Power-up Timer Enable bit (PWRT enabled)
#pragma config BOR = OFF        // Brown-out Reset Enable bits (Brown-out Reset disabled in hardware and software)
#pragma config BORV = 3         // Brown-out Reset Voltage bits (Minimum setting)
#pragma config VREGEN = OFF     // USB Voltage Regulator Enable bit (USB voltage regulator disabled)

// CONFIG2H
#pragma config WDT = OFF        // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)

// CONFIG3H
#pragma config CCP2MX = ON      // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = OFF     // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)
#pragma config LPT1OSC = OFF    // Low-Power Timer 1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON// MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)

// CONFIG4L
#pragma config STVREN = OFF     // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = OFF      // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled)
#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))

// CONFIG5L
#pragma config CP0 = OFF        // Code Protection bit (Block 0 (000800-001FFFh) is not code-protected)
#pragma config CP1 = OFF        // Code Protection bit (Block 1 (002000-003FFFh) is not code-protected)
#pragma config CP2 = OFF        // Code Protection bit (Block 2 (004000-005FFFh) is not code-protected)
#pragma config CP3 = OFF        // Code Protection bit (Block 3 (006000-007FFFh) is not code-protected)

// CONFIG5H
#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block (000000-0007FFh) is not code-protected)
#pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM is not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF       // Write Protection bit (Block 0 (000800-001FFFh) is not write-protected)
#pragma config WRT1 = OFF       // Write Protection bit (Block 1 (002000-003FFFh) is not write-protected)
#pragma config WRT2 = OFF       // Write Protection bit (Block 2 (004000-005FFFh) is not write-protected)
#pragma config WRT3 = OFF       // Write Protection bit (Block 3 (006000-007FFFh) is not write-protected)

// CONFIG6H
#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) are not write-protected)
#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot block (000000-0007FFh) is not write-protected)
#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM is not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protection bit (Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF      // Table Read Protection bit (Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF      // Table Read Protection bit (Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF      // Table Read Protection bit (Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) is not protected from table reads executed in other blocks)


int main(void) {

    PORTC = 0x00;
    LATC = 0x00;
    TRISC = 0x00;

        
        while(1){

            PORTC = 0xFF;
            __delay_ms(50);
            PORTC = 0x00;
            __delay_ms(50);
        }
    
}

[Klaus (Gast)]

Franz schrieb:
> #include <stdio.h>
> #include <stdlib.h>
> #include <pic18f2550.h>
> #include <delays.h>
>
> // PIC18F2550 Configuration Bit Settings
>
> #include <xc.h>
>
> #define _XTAL_FREQ 8000000

ich würde die includes so setzen:

#define _XTAL_FREQ 8000000
#include <xc.h>
#include <stdio.h> 
#include <stdlib.h> 
#include <delays.h>

Den pic18f2550.h braucht man IMHO nicht, das erledigt xc.h schon mit den 
Projekteinstellungen

MfG Klaus

[Franz (Gast)]

OK Danke