1 | #include <avr/io.h>
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2 | #include <util/delay.h>
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3 |
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4 | #define WP (1<<PC5) // Write Protect disable @PC5
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5 | #define HOLD (1<<PC4) // Stop serial communication disable @PC4
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6 | #define CE (1<<PB2) // Chip Enable @PB2
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7 | #define MOSI (1<<PB3) // Master Out Slave In @PB3
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8 | #define MISO (1<<PB4) // Master In Slave Out @PB4
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9 | #define SCK (1<<PB5) // Clock @PB5
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10 |
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11 | uint8_t data, status_register=0;
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12 |
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13 | void SPI_MasterInit(void)
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14 | {
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15 | DDRB = MOSI|SCK|CE; // Set MOSI, SCK, CE output
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16 | SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR1); // Enable SPI, Master, set clock rate fck/64
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17 | }
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18 | void SPI_MasterTransmit(uint8_t data)
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19 | {
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20 | SPDR = data; // Start transmission
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21 | while(!(SPSR & (1<<SPIF))); // Wait for transmission complete
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22 | }
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23 |
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24 | uint8_t SPI_SlaveReceive(void)
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25 | {
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26 | while(!(SPSR & (1<<SPIF))); // Wait for reception complete
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27 | return SPDR; // Return SPI-Dataregister
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28 | }
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29 |
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30 | int main(void)
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31 | {
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32 | DDRC |= WP | HOLD; // Set WP, HOLD output
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33 | PORTC |= WP|HOLD; // Set WP, HOLD high
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34 |
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35 | while(1)
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36 | {
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37 | SPI_MasterInit(); // Init SPI Master
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38 | PORTB &= ~CE; // CE = low (start communication)
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39 | SPI_MasterTransmit(0x05); // Send command 0x05 (Read the status register)
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40 | SPI_MasterTransmit(0x00); // Send one dummy byte
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41 | status_register = SPI_SlaveReceive(); // Store the value of the status register
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42 | PORTB |= CE; // CE = high (end of communication)
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43 | status_register=0; // set the variable to 0
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44 | _delay_us(10);
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45 |
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46 | PORTB &= ~CE; // CE = low (start communication)
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47 | SPI_MasterTransmit(0x06); // Send command 0x06 (Set write enable WREN)
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48 | PORTB |= CE; // CE = high (end of communication)
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49 | _delay_us(10);
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50 |
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51 | PORTB &= ~CE; // CE = low (start communication)
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52 | SPI_MasterTransmit(0x02); // Send command 0x02 (program one data byte)
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53 | SPI_MasterTransmit(0x00); // Send 1. Addressbyte (MSB first)
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54 | SPI_MasterTransmit(0x00); // Send 2. Addressbyte
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55 | SPI_MasterTransmit(0x00); // Send 3. Addressbyte
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56 | SPI_MasterTransmit(0xAA); // Send Databyte
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57 | PORTB |= CE; // CE = high (end of communication)
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58 | _delay_us(10);
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59 |
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60 | PORTB &= ~CE; // CE = low (start communication)
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61 | SPI_MasterTransmit(0x04); // WRDI (write disable) Send command 0x04
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62 | PORTB |= CE; // CE = high (end of communication)
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63 | _delay_us(10);
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64 |
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65 | PORTB &= ~CE; // CE = low (start communication)
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66 | SPI_MasterTransmit(0x03); // Send command 0x03 Read
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67 | SPI_MasterTransmit(0x00); // Send 1. Addressbyte (MSB first)
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68 | SPI_MasterTransmit(0x00); // Send 2. Addressbyte
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69 | SPI_MasterTransmit(0x00); // Send 3. Addressbyte
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70 | SPI_MasterTransmit(0x00); // Send Dummybyte
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71 | PORTB |= CE; // CE = high (end of communication)
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72 | data = SPI_SlaveReceive();
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73 | data = 0;
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74 | }
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75 | }
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