1 | int main(void)
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2 | {
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3 | struct dma_channel_config config;
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4 |
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5 | pmic_init();
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6 | board_init();
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7 | sysclk_init();
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8 | sleepmgr_init();
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9 |
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10 | // USART options.
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11 | static usart_rs232_options_t USART_SERIAL_OPTIONS = {
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12 | .baudrate = USART_SERIAL_EXAMPLE_BAUDRATE,
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13 | .charlength = USART_SERIAL_CHAR_LENGTH,
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14 | .paritytype = USART_SERIAL_PARITY,
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15 | .stopbits = USART_SERIAL_STOP_BIT
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16 | };
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17 |
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18 | // Initialize usart driver in RS232 mode
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19 | usart_init_rs232(USART_SERIAL_EXAMPLE, &USART_SERIAL_OPTIONS);
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20 |
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21 | uint8_t tx_buf[] = "\nHello AVR world ! :";
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22 | uint8_t tx_length = 20;
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23 | uint8_t i = 0;
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24 | for (i = 0; i < tx_length; i++) {
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25 | usart_putchar(USART_SERIAL_EXAMPLE, tx_buf[i]);
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26 | }
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27 |
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28 | dma_enable();
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29 |
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30 | dma_set_callback(DMA_CHANNEL, example_dma_transfer_done);
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31 |
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32 | /* Make sure config is all zeroed out so we don't get any stray bits */
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33 | memset(&config, 0, sizeof(config));
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34 |
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35 | /*
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36 | * This example will configure a DMA channel with the following
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37 | * settings:
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38 | * - CHANGED: High interrupt priority
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39 | * - 1 byte burst length
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40 | * - DMA_BUFFER_SIZE bytes for each transfer
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41 | * - CHANGED: Reload source only (not destination) address at end of each transfer
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42 | * - CHANGED: Increment only source (not destination) address during transfer
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43 | * - Source address is set to \ref source
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44 | * - Destination address is set to \ref destination
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45 | */
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46 | dma_channel_set_interrupt_level(&config, DMA_INT_LVL_HI);
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47 | dma_channel_set_burst_length(&config, DMA_CH_BURSTLEN_1BYTE_gc);
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48 | dma_channel_set_transfer_count(&config, DMA_BUFFER_SIZE);
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49 | //dma_channel_set_single_shot(&config);
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50 |
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51 | dma_channel_set_src_reload_mode(&config,DMA_CH_SRCRELOAD_TRANSACTION_gc);
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52 | dma_channel_set_dest_reload_mode(&config,DMA_CH_DESTRELOAD_NONE_gc);
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53 | dma_channel_set_src_dir_mode(&config, DMA_CH_SRCDIR_INC_gc);
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54 | dma_channel_set_dest_dir_mode(&config, DMA_CH_DESTDIR_FIXED_gc);
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55 | dma_channel_set_source_address(&config, (uint16_t)(uintptr_t)source);
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56 | //dma_channel_set_destination_address(&config, (uint16_t)(uintptr_t)destination);
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57 | uint16_t uartc0_data_addr = 0x08A0; //USARTC0_DATA
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58 | dma_channel_set_destination_address(&config, uartc0_data_addr);
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59 | dma_channel_set_trigger_source(&config, DMA_CH_TRIGSRC_USARTC0_DRE_gc);
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60 | //USARTC0.CTRLA |= USART_DREINTLVL0_bm;
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61 |
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62 | dma_channel_write_config(DMA_CHANNEL, &config);
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63 |
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64 | /* Use the configuration above by enabling the DMA channel in use. */
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65 | dma_channel_enable(DMA_CHANNEL);
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66 |
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67 | cpu_irq_enable();
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68 |
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69 | while (true) {
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70 | }
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71 | }
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