1 | void ADC_Setup(void)
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2 | {
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3 | ADC_InitTypeDef ADC_InitStructure;
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4 | ADC_CommonInitTypeDef ADC_CommonInitStructure;
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5 | DMA_InitTypeDef DMA_InitStructure;
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6 | GPIO_InitTypeDef GPIO_initStruct;
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7 |
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8 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
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9 | RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
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10 | RCC_AHB1PeriphClockCmd((RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB |
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11 | RCC_AHB1Periph_GPIOC), ENABLE);
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12 |
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13 | // DMA2 Stream0 channel0 configuration
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14 | DMA_Cmd(DMA2_Stream0, DISABLE);
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15 | while (DMA2_Stream0->CR & DMA_SxCR_EN);
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16 |
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17 | DMA_InitStructure.DMA_Channel = DMA_Channel_0; //DMA channel 0..7
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18 | DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&ADC1->DR; //ADC1 Address
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19 | DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)ADC_Buffer; //uint16_t ADC_Buffer
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20 | DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; // Data from Peripheral to memory
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21 | DMA_InitStructure.DMA_BufferSize = NBR_OF_CHANNELS; //Number of Data
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22 | DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; //increment peripheral pointer
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23 | DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; //increment address pointer
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24 | DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; //size of data .. 16bit
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25 | DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; //size of data
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26 | DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; //start from beginning when end is reached
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27 | DMA_InitStructure.DMA_Priority = DMA_Priority_High; //high - only adc exists
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28 | DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; //FIFO or direct
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29 | DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full; //FIFO specific
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30 | DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; //specifies the amount of data to be transferred in a single non interruptable transaction
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31 | DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; //specifies the amount of data to be transferred in a single non interruptable transaction
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32 | DMA_Init(DMA2_Stream0, &DMA_InitStructure);
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33 |
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34 | DMA_ITConfig(DMA2_Stream0, DMA_IT_TC, ENABLE);
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35 |
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36 | NVIC_InitTypeDef NVIC_InitStructure;
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37 | NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream0_IRQn;
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38 | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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39 | NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0;
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40 | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0;
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41 | NVIC_Init(&NVIC_InitStructure);
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42 |
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43 | DMA_ClearFlag(DMA2_Stream0, DMA_FLAG_FEIF2|DMA_FLAG_DMEIF2|DMA_FLAG_TEIF2|DMA_FLAG_HTIF2|DMA_FLAG_TCIF2);
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44 | DMA_Cmd(DMA2_Stream0, ENABLE);
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45 |
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46 |
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47 | // Configure ADC1 Pins
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48 | GPIO_initStruct.GPIO_Mode = GPIO_Mode_AN;
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49 | GPIO_initStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
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50 |
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51 | GPIO_initStruct.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_6 | GPIO_Pin_7;
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52 | GPIO_Init(GPIOA, &GPIO_initStruct);
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53 |
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54 | GPIO_initStruct.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5;
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55 | GPIO_Init(GPIOC, &GPIO_initStruct);
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56 |
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57 | // ADC1 Init
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58 | ADC_DeInit();
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59 | ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent; //single, dual, triple
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60 | ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div6; //max 14MHz aus APB2? (Diller)
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61 | ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled; //
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62 | ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_20Cycles; //Delay between to ADC-cycles
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63 | ADC_CommonInit(&ADC_CommonInitStructure);
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64 |
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65 | ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
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66 | ADC_InitStructure.ADC_ScanConvMode = ENABLE; //Enable: Multiplexing
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67 | ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; //Start next Conv. immediately
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68 | ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
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69 | ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; //this case: Software trigger
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70 | ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
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71 | ADC_InitStructure.ADC_NbrOfConversion = NBR_OF_CHANNELS; //number of channels in regular group
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72 | ADC_Init(ADC1, &ADC_InitStructure);
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73 |
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74 | // ADC1 regular channel config
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75 | ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_480Cycles);
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76 | ADC_RegularChannelConfig(ADC1, ADC_Channel_1, 2, ADC_SampleTime_480Cycles);
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77 | ADC_RegularChannelConfig(ADC1, ADC_Channel_2, 3, ADC_SampleTime_480Cycles);
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78 | ADC_RegularChannelConfig(ADC1, ADC_Channel_3, 4, ADC_SampleTime_480Cycles);
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79 | ADC_RegularChannelConfig(ADC1, ADC_Channel_6, 5, ADC_SampleTime_480Cycles);
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80 |
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81 | ADC_RegularChannelConfig(ADC1, ADC_Channel_7, 6, ADC_SampleTime_480Cycles);
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82 |
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83 | ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 7, ADC_SampleTime_480Cycles);
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84 | ADC_RegularChannelConfig(ADC1, ADC_Channel_11, 8, ADC_SampleTime_480Cycles);
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85 | ADC_RegularChannelConfig(ADC1, ADC_Channel_12, 9, ADC_SampleTime_480Cycles);
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86 | ADC_RegularChannelConfig(ADC1, ADC_Channel_13, 10, ADC_SampleTime_480Cycles);
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87 | ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 11, ADC_SampleTime_480Cycles);
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88 | ADC_RegularChannelConfig(ADC1, ADC_Channel_15, 12, ADC_SampleTime_480Cycles);
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89 |
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90 | // Enable DMA request after last transfer (Single-ADC mode)
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91 | ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE);
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92 |
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93 | // Enable ADC1 DMA
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94 | ADC_DMACmd(ADC1, ENABLE);
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95 |
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96 | // Enable ADC1
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97 | ADC_Cmd(ADC1, ENABLE);
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98 |
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99 | ADC_SoftwareStartConv(ADC1);
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100 | }
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