1 | Builds/main.elf: file format elf32-avr
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2 |
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3 | Sections:
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4 | Idx Name Size VMA LMA File off Algn
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5 | 0 .data 00000000 00800100 00000388 000003fc 2**0
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6 | CONTENTS, ALLOC, LOAD, DATA
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7 | 1 .text 00000388 00000000 00000000 00000074 2**1
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8 | CONTENTS, ALLOC, LOAD, READONLY, CODE
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9 | 2 .stab 00001fec 00000000 00000000 000003fc 2**2
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10 | CONTENTS, READONLY, DEBUGGING
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11 | 3 .stabstr 00002079 00000000 00000000 000023e8 2**0
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12 | CONTENTS, READONLY, DEBUGGING
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13 | 4 .comment 00000011 00000000 00000000 00004461 2**0
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14 | CONTENTS, READONLY
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15 | 5 .debug_aranges 00000020 00000000 00000000 00004478 2**3
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16 | CONTENTS, READONLY, DEBUGGING
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17 | 6 .debug_info 000000be 00000000 00000000 00004498 2**0
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18 | CONTENTS, READONLY, DEBUGGING
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19 | 7 .debug_abbrev 00000014 00000000 00000000 00004556 2**0
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20 | CONTENTS, READONLY, DEBUGGING
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21 | 8 .debug_line 00000058 00000000 00000000 0000456a 2**0
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22 | CONTENTS, READONLY, DEBUGGING
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23 |
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24 | Disassembly of section .text:
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25 |
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26 | 00000000 <__vectors>:
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27 | 0: 0c 94 34 00 jmp 0x68 ; 0x68 <__ctors_end>
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28 | 4: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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29 | 8: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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30 | c: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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31 | 10: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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32 | 14: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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33 | 18: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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34 | 1c: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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35 | 20: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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36 | 24: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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37 | 28: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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38 | 2c: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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39 | 30: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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40 | 34: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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41 | 38: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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42 | 3c: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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43 | 40: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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44 | 44: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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45 | 48: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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46 | 4c: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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47 | 50: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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48 | 54: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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49 | 58: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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50 | 5c: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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51 | 60: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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52 | 64: 0c 94 3e 00 jmp 0x7c ; 0x7c <__bad_interrupt>
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53 |
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54 | 00000068 <__ctors_end>:
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55 | 68: 11 24 eor r1, r1
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56 | 6a: 1f be out 0x3f, r1 ; 63
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57 | 6c: cf ef ldi r28, 0xFF ; 255
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58 | 6e: d8 e0 ldi r29, 0x08 ; 8
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59 | 70: de bf out 0x3e, r29 ; 62
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60 | 72: cd bf out 0x3d, r28 ; 61
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61 | 74: 0e 94 b2 01 call 0x364 ; 0x364 <main>
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62 | 78: 0c 94 c2 01 jmp 0x384 ; 0x384 <_exit>
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63 |
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64 | 0000007c <__bad_interrupt>:
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65 | 7c: 0c 94 00 00 jmp 0 ; 0x0 <__vectors>
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66 |
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67 | 00000080 <_ZN6RX5808C1Ev>:
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68 |
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69 | //******************************************************************************
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70 | //* function: init SPI Pins
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71 | //******************************************************************************
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72 | RX5808::RX5808(){
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73 | DDRD = (1<<SPI_CLOCK_PIN) | (1<<SLAVE_SELECT_PIN) | (1<<SPI_DATA_PIN);
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74 | 80: 8c e1 ldi r24, 0x1C ; 28
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75 | 82: 8a b9 out 0x0a, r24 ; 10
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76 | 84: 08 95 ret
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77 |
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78 | 00000086 <_ZN6RX58086setPINEhh>:
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79 | }
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80 | //******************************************************************************
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81 | //* function: set SPI Pins
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82 | //******************************************************************************
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83 | void RX5808::setPIN( uint8_t pinNr, uint8_t state){
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84 | if (state) {
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85 | 86: 44 23 and r20, r20
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86 | 88: 49 f0 breq .+18 ; 0x9c <_ZN6RX58086setPINEhh+0x16>
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87 | PORTD = 1<<pinNr ;
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88 | 8a: 81 e0 ldi r24, 0x01 ; 1
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89 | 8c: 90 e0 ldi r25, 0x00 ; 0
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90 | 8e: 06 2e mov r0, r22
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91 | 90: 01 c0 rjmp .+2 ; 0x94 <_ZN6RX58086setPINEhh+0xe>
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92 | 92: 88 0f add r24, r24
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93 | 94: 0a 94 dec r0
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94 | 96: ea f7 brpl .-6 ; 0x92 <_ZN6RX58086setPINEhh+0xc>
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95 | 98: 8b b9 out 0x0b, r24 ; 11
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96 | 9a: 08 95 ret
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97 | }else{
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98 | PORTD = 0<<pinNr ;
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99 | 9c: 1b b8 out 0x0b, r1 ; 11
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100 | 9e: 08 95 ret
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101 |
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102 | 000000a0 <_ZN6RX58085spi_1Ev>:
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103 | a0: 1b b8 out 0x0b, r1 ; 11
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104 | #else
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105 | //round up by default
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106 | __ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
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107 | #endif
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108 |
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109 | __builtin_avr_delay_cycles(__ticks_dc);
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110 | a2: 82 e0 ldi r24, 0x02 ; 2
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111 | a4: 8a 95 dec r24
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112 | a6: f1 f7 brne .-4 ; 0xa4 <_ZN6RX58085spi_1Ev+0x4>
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113 | a8: 00 c0 rjmp .+0 ; 0xaa <_ZN6RX58085spi_1Ev+0xa>
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114 | PORTD = 1<<pinNr ;
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115 | aa: 80 e1 ldi r24, 0x10 ; 16
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116 | ac: 8b b9 out 0x0b, r24 ; 11
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117 | ae: 82 e0 ldi r24, 0x02 ; 2
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118 | b0: 8a 95 dec r24
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119 | b2: f1 f7 brne .-4 ; 0xb0 <_ZN6RX58085spi_1Ev+0x10>
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120 | b4: 00 c0 rjmp .+0 ; 0xb6 <_ZN6RX58085spi_1Ev+0x16>
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121 | b6: 84 e0 ldi r24, 0x04 ; 4
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122 | b8: 8b b9 out 0x0b, r24 ; 11
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123 | ba: 82 e0 ldi r24, 0x02 ; 2
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124 | bc: 8a 95 dec r24
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125 | be: f1 f7 brne .-4 ; 0xbc <_ZN6RX58085spi_1Ev+0x1c>
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126 | c0: 00 c0 rjmp .+0 ; 0xc2 <_ZN6RX58085spi_1Ev+0x22>
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127 | PORTD = 0<<pinNr ;
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128 | c2: 1b b8 out 0x0b, r1 ; 11
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129 | c4: 82 e0 ldi r24, 0x02 ; 2
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130 | c6: 8a 95 dec r24
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131 | c8: f1 f7 brne .-4 ; 0xc6 <_ZN6RX58085spi_1Ev+0x26>
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132 | ca: 00 c0 rjmp .+0 ; 0xcc <_ZN6RX58085spi_1Ev+0x2c>
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133 | cc: 08 95 ret
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134 |
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135 | 000000ce <_ZN6RX58085spi_0Ev>:
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136 | ce: 1b b8 out 0x0b, r1 ; 11
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137 | d0: 82 e0 ldi r24, 0x02 ; 2
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138 | d2: 8a 95 dec r24
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139 | d4: f1 f7 brne .-4 ; 0xd2 <_ZN6RX58085spi_0Ev+0x4>
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140 | d6: 00 c0 rjmp .+0 ; 0xd8 <_ZN6RX58085spi_0Ev+0xa>
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141 | d8: 1b b8 out 0x0b, r1 ; 11
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142 | da: 82 e0 ldi r24, 0x02 ; 2
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143 | dc: 8a 95 dec r24
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144 | de: f1 f7 brne .-4 ; 0xdc <_ZN6RX58085spi_0Ev+0xe>
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145 | e0: 00 c0 rjmp .+0 ; 0xe2 <_ZN6RX58085spi_0Ev+0x14>
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146 | PORTD = 1<<pinNr ;
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147 | e2: 84 e0 ldi r24, 0x04 ; 4
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148 | e4: 8b b9 out 0x0b, r24 ; 11
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149 | e6: 82 e0 ldi r24, 0x02 ; 2
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150 | e8: 8a 95 dec r24
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151 | ea: f1 f7 brne .-4 ; 0xe8 <_ZN6RX58085spi_0Ev+0x1a>
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152 | ec: 00 c0 rjmp .+0 ; 0xee <_ZN6RX58085spi_0Ev+0x20>
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153 | PORTD = 0<<pinNr ;
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154 | ee: 1b b8 out 0x0b, r1 ; 11
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155 | f0: 82 e0 ldi r24, 0x02 ; 2
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156 | f2: 8a 95 dec r24
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157 | f4: f1 f7 brne .-4 ; 0xf2 <_ZN6RX58085spi_0Ev+0x24>
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158 | f6: 00 c0 rjmp .+0 ; 0xf8 <_ZN6RX58085spi_0Ev+0x2a>
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159 | f8: 08 95 ret
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160 |
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161 | 000000fa <_ZN6RX58089spiEnableEb>:
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162 | //******************************************************************************
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163 | //* function: spiEnableLow
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164 | //******************************************************************************
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165 | void RX5808::spiEnable(bool state)
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166 | {
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167 | if (state) {
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168 | fa: 66 23 and r22, r22
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169 | fc: 39 f0 breq .+14 ; 0x10c <_ZN6RX58089spiEnableEb+0x12>
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170 | fe: 82 e0 ldi r24, 0x02 ; 2
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171 | 100: 8a 95 dec r24
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172 | 102: f1 f7 brne .-4 ; 0x100 <_ZN6RX58089spiEnableEb+0x6>
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173 | 104: 00 c0 rjmp .+0 ; 0x106 <_ZN6RX58089spiEnableEb+0xc>
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174 | PORTD = 1<<pinNr ;
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175 | 106: 88 e0 ldi r24, 0x08 ; 8
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176 | 108: 8b b9 out 0x0b, r24 ; 11
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177 | 10a: 05 c0 rjmp .+10 ; 0x116 <_ZN6RX58089spiEnableEb+0x1c>
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178 | 10c: 82 e0 ldi r24, 0x02 ; 2
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179 | 10e: 8a 95 dec r24
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180 | 110: f1 f7 brne .-4 ; 0x10e <_ZN6RX58089spiEnableEb+0x14>
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181 | 112: 00 c0 rjmp .+0 ; 0x114 <_ZN6RX58089spiEnableEb+0x1a>
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182 | PORTD = 0<<pinNr ;
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183 | 114: 1b b8 out 0x0b, r1 ; 11
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184 | 116: 82 e0 ldi r24, 0x02 ; 2
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185 | 118: 8a 95 dec r24
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186 | 11a: f1 f7 brne .-4 ; 0x118 <_ZN6RX58089spiEnableEb+0x1e>
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187 | 11c: 00 c0 rjmp .+0 ; 0x11e <_ZN6RX58089spiEnableEb+0x24>
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188 | 11e: 08 95 ret
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189 |
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190 | 00000120 <_ZN6RX580817calcFrequencyDataEj>:
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191 | //******************************************************************************
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192 | uint16_t RX5808::calcFrequencyData( uint16_t frequency )
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193 | {
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194 | uint16_t N;
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195 | uint8_t A;
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196 | frequency = (frequency - 479) / 2;
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197 | 120: 6f 5d subi r22, 0xDF ; 223
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198 | 122: 71 40 sbci r23, 0x01 ; 1
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199 | 124: cb 01 movw r24, r22
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200 | 126: 96 95 lsr r25
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201 | 128: 87 95 ror r24
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202 | N = frequency / 32;
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203 | A = frequency % 32;
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204 | 12a: 28 2f mov r18, r24
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205 | 12c: 2f 71 andi r18, 0x1F ; 31
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206 | N = frequency / 32;
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207 | 12e: cb 01 movw r24, r22
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208 | 130: 36 e0 ldi r19, 0x06 ; 6
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209 | 132: 96 95 lsr r25
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210 | 134: 87 95 ror r24
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211 | 136: 3a 95 dec r19
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212 | 138: e1 f7 brne .-8 ; 0x132 <_ZN6RX580817calcFrequencyDataEj+0x12>
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213 | return (N << 7) | A;
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214 | 13a: 96 95 lsr r25
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215 | 13c: 98 2f mov r25, r24
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216 | 13e: 88 27 eor r24, r24
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217 | 140: 97 95 ror r25
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218 | 142: 87 95 ror r24
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219 | }
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220 | 144: 82 2b or r24, r18
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221 | 146: 08 95 ret
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222 |
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223 | 00000148 <_ZN6RX580812setFrequencyEj>:
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224 | //* : 1 bit Read or Write 0=Read 1=Write
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225 | //* : 13 bits N-Register Data LSB first
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226 | //* : 7 bits A-Register LSB first
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227 | //******************************************************************************
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228 |
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229 | void RX5808::setFrequency( uint16_t frequency){
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230 | 148: ff 92 push r15
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231 | 14a: 0f 93 push r16
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232 | 14c: 1f 93 push r17
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233 | 14e: cf 93 push r28
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234 | 150: df 93 push r29
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235 | 152: ec 01 movw r28, r24
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236 |
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237 | uint16_t sRegB;
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238 | uint8_t i;
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239 |
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240 | sRegB = calcFrequencyData(frequency);
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241 | 154: 0e 94 90 00 call 0x120 ; 0x120 <_ZN6RX580817calcFrequencyDataEj>
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242 | 158: 8c 01 movw r16, r24
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243 | 15a: 82 e0 ldi r24, 0x02 ; 2
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244 | 15c: 8a 95 dec r24
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245 | 15e: f1 f7 brne .-4 ; 0x15c <_ZN6RX580812setFrequencyEj+0x14>
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246 | 160: 00 c0 rjmp .+0 ; 0x162 <_ZN6RX580812setFrequencyEj+0x1a>
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247 | PORTD = 1<<pinNr ;
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248 | 162: 88 e0 ldi r24, 0x08 ; 8
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249 | 164: 8b b9 out 0x0b, r24 ; 11
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250 | 166: 82 e0 ldi r24, 0x02 ; 2
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251 | 168: 8a 95 dec r24
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252 | 16a: f1 f7 brne .-4 ; 0x168 <_ZN6RX580812setFrequencyEj+0x20>
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253 | 16c: 00 c0 rjmp .+0 ; 0x16e <_ZN6RX580812setFrequencyEj+0x26>
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254 | 16e: 82 e0 ldi r24, 0x02 ; 2
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255 | 170: 8a 95 dec r24
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256 | 172: f1 f7 brne .-4 ; 0x170 <_ZN6RX580812setFrequencyEj+0x28>
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257 | 174: 00 c0 rjmp .+0 ; 0x176 <_ZN6RX580812setFrequencyEj+0x2e>
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258 | 176: 82 e0 ldi r24, 0x02 ; 2
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259 | 178: 8a 95 dec r24
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260 | 17a: f1 f7 brne .-4 ; 0x178 <_ZN6RX580812setFrequencyEj+0x30>
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261 | 17c: 00 c0 rjmp .+0 ; 0x17e <_ZN6RX580812setFrequencyEj+0x36>
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262 | PORTD = 0<<pinNr ;
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263 | 17e: 1b b8 out 0x0b, r1 ; 11
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264 | 180: 82 e0 ldi r24, 0x02 ; 2
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265 | 182: 8a 95 dec r24
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266 | 184: f1 f7 brne .-4 ; 0x182 <_ZN6RX580812setFrequencyEj+0x3a>
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267 | 186: 00 c0 rjmp .+0 ; 0x188 <_ZN6RX580812setFrequencyEj+0x40>
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268 | spiEnable(true);
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269 | _delay_us(1);
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270 | spiEnable(false);
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271 |
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272 | // Address (0x1)
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273 | spi_1();
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274 | 188: ce 01 movw r24, r28
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275 | 18a: 0e 94 50 00 call 0xa0 ; 0xa0 <_ZN6RX58085spi_1Ev>
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276 | spi_0();
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277 | 18e: ce 01 movw r24, r28
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278 | 190: 0e 94 67 00 call 0xce ; 0xce <_ZN6RX58085spi_0Ev>
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279 | spi_0();
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280 | 194: ce 01 movw r24, r28
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281 | 196: 0e 94 67 00 call 0xce ; 0xce <_ZN6RX58085spi_0Ev>
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282 | spi_0();
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283 | 19a: ce 01 movw r24, r28
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284 | 19c: 0e 94 67 00 call 0xce ; 0xce <_ZN6RX58085spi_0Ev>
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285 |
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286 | // Read/Write (Write)
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287 | spi_1();
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288 | 1a0: ce 01 movw r24, r28
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289 | 1a2: 0e 94 50 00 call 0xa0 ; 0xa0 <_ZN6RX58085spi_1Ev>
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290 | 1a6: 60 e1 ldi r22, 0x10 ; 16
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291 | 1a8: f6 2e mov r15, r22
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292 |
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293 | // Data (16 LSB bits)
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294 | for (i = 16; i; i--, sRegB >>= 1 ) {
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295 | (sRegB & 0x1) ? spi_1() : spi_0();
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296 | 1aa: ce 01 movw r24, r28
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297 | 1ac: 00 ff sbrs r16, 0
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298 | 1ae: 03 c0 rjmp .+6 ; 0x1b6 <_ZN6RX580812setFrequencyEj+0x6e>
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299 | 1b0: 0e 94 50 00 call 0xa0 ; 0xa0 <_ZN6RX58085spi_1Ev>
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300 | 1b4: 02 c0 rjmp .+4 ; 0x1ba <_ZN6RX580812setFrequencyEj+0x72>
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301 | 1b6: 0e 94 67 00 call 0xce ; 0xce <_ZN6RX58085spi_0Ev>
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302 | for (i = 16; i; i--, sRegB >>= 1 ) {
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303 | 1ba: 16 95 lsr r17
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304 | 1bc: 07 95 ror r16
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305 | 1be: fa 94 dec r15
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306 | 1c0: a1 f7 brne .-24 ; 0x1aa <_ZN6RX580812setFrequencyEj+0x62>
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307 | }
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308 | // Data zero padding
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309 | spi_0();
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310 | 1c2: ce 01 movw r24, r28
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311 | 1c4: 0e 94 67 00 call 0xce ; 0xce <_ZN6RX58085spi_0Ev>
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312 | spi_0();
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313 | 1c8: ce 01 movw r24, r28
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314 | 1ca: 0e 94 67 00 call 0xce ; 0xce <_ZN6RX58085spi_0Ev>
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315 | spi_0();
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316 | 1ce: ce 01 movw r24, r28
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317 | 1d0: 0e 94 67 00 call 0xce ; 0xce <_ZN6RX58085spi_0Ev>
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318 | spi_0();
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319 | 1d4: ce 01 movw r24, r28
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320 | 1d6: 0e 94 67 00 call 0xce ; 0xce <_ZN6RX58085spi_0Ev>
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321 | 1da: 82 e0 ldi r24, 0x02 ; 2
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322 | 1dc: 8a 95 dec r24
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323 | 1de: f1 f7 brne .-4 ; 0x1dc <_ZN6RX580812setFrequencyEj+0x94>
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324 | 1e0: 00 c0 rjmp .+0 ; 0x1e2 <_ZN6RX580812setFrequencyEj+0x9a>
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325 | PORTD = 1<<pinNr ;
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326 | 1e2: 88 e0 ldi r24, 0x08 ; 8
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327 | 1e4: 8b b9 out 0x0b, r24 ; 11
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328 | 1e6: 82 e0 ldi r24, 0x02 ; 2
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329 | 1e8: 8a 95 dec r24
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330 | 1ea: f1 f7 brne .-4 ; 0x1e8 <_ZN6RX580812setFrequencyEj+0xa0>
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331 | 1ec: 00 c0 rjmp .+0 ; 0x1ee <_ZN6RX580812setFrequencyEj+0xa6>
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332 | 1ee: 82 e0 ldi r24, 0x02 ; 2
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333 | 1f0: 8a 95 dec r24
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334 | 1f2: f1 f7 brne .-4 ; 0x1f0 <_ZN6RX580812setFrequencyEj+0xa8>
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335 | 1f4: 00 c0 rjmp .+0 ; 0x1f6 <_ZN6RX580812setFrequencyEj+0xae>
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336 | PORTD = 0<<pinNr ;
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337 | 1f6: 1b b8 out 0x0b, r1 ; 11
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338 | 1f8: 1b b8 out 0x0b, r1 ; 11
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339 | 1fa: 1b b8 out 0x0b, r1 ; 11
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340 | _delay_us(1);
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341 |
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342 | setPIN(SLAVE_SELECT_PIN, LOW);
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343 | setPIN(SPI_CLOCK_PIN, LOW);
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344 | setPIN(SPI_DATA_PIN, LOW);
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345 | }
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346 | 1fc: df 91 pop r29
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347 | 1fe: cf 91 pop r28
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348 | 200: 1f 91 pop r17
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349 | 202: 0f 91 pop r16
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350 | 204: ff 90 pop r15
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351 | 206: 08 95 ret
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352 |
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353 | 00000208 <_Z8spi_initv>:
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354 | void spi_init()
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355 | // Initialize pins for spi communication
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356 | {
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357 | // DDRB &= ~((1<<MOSI)|(1<<MISO)|(1<<SS)|(1<<SCK));
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358 | // Define the following pins as output
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359 | DDRB |= ((1<<MOSI)|(1<<SS)|(1<<SCK)) | (1<<RESET);
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360 | 208: 84 b1 in r24, 0x04 ; 4
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361 | 20a: 8d 62 ori r24, 0x2D ; 45
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362 | 20c: 84 b9 out 0x04, r24 ; 4
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363 | (0<<SPIE)| // SPI Interupt Enable
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364 | (0<<DORD)| // Data Order (0:MSB first / 1:LSB first)
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365 | (1<<MSTR)| // Master/Slave select
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366 | (0<<SPR1)|(1<<SPR0)| // SPI Clock Rate
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367 | (0<<CPOL)| // Clock Polarity (0:SCK low / 1:SCK hi when idle)
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368 | (0<<CPHA)); // Clock Phase (0:leading / 1:trailing edge sampling)
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369 | 20e: 81 e5 ldi r24, 0x51 ; 81
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370 | 210: 8c bd out 0x2c, r24 ; 44
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371 |
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372 | SPSR = (1<<SPI2X); // Double Clock Rate
|
373 | 212: 81 e0 ldi r24, 0x01 ; 1
|
374 | 214: 8d bd out 0x2d, r24 ; 45
|
375 |
|
376 | PORTB |= (1<<PB2); //set SS to hight = deselected
|
377 | 216: 2a 9a sbi 0x05, 2 ; 5
|
378 | 218: 08 95 ret
|
379 |
|
380 | 0000021a <_Z15spi_selectSlaveb>:
|
381 | }
|
382 |
|
383 | void spi_selectSlave(bool select){
|
384 | if( select ){
|
385 | 21a: 88 23 and r24, r24
|
386 | 21c: 11 f0 breq .+4 ; 0x222 <_Z15spi_selectSlaveb+0x8>
|
387 | PORTB &= ~(1<<PB2); //set SS to low , selected
|
388 | 21e: 2a 98 cbi 0x05, 2 ; 5
|
389 | 220: 08 95 ret
|
390 | }else{
|
391 | PORTB |= (1<<PB2);
|
392 | 222: 2a 9a sbi 0x05, 2 ; 5
|
393 | 224: 08 95 ret
|
394 |
|
395 | 00000226 <_Z17spi_transfer_syncPhS_h>:
|
396 | }
|
397 | }
|
398 |
|
399 | void spi_transfer_sync (uint8_t * dataout, uint8_t * datain, uint8_t len)
|
400 | // Shift full array through target device
|
401 | {
|
402 | 226: 26 2f mov r18, r22
|
403 | uint8_t i;
|
404 | for (i = 0; i < len; i++) {
|
405 | 228: fb 01 movw r30, r22
|
406 | 22a: 3e 2f mov r19, r30
|
407 | 22c: 32 1b sub r19, r18
|
408 | 22e: 34 17 cp r19, r20
|
409 | 230: 50 f4 brcc .+20 ; 0x246 <_Z17spi_transfer_syncPhS_h+0x20>
|
410 | SPDR = dataout[i];
|
411 | 232: dc 01 movw r26, r24
|
412 | 234: 3d 91 ld r19, X+
|
413 | 236: cd 01 movw r24, r26
|
414 | 238: 3e bd out 0x2e, r19 ; 46
|
415 | while((SPSR & (1<<SPIF))==0);
|
416 | 23a: 0d b4 in r0, 0x2d ; 45
|
417 | 23c: 07 fe sbrs r0, 7
|
418 | 23e: fd cf rjmp .-6 ; 0x23a <_Z17spi_transfer_syncPhS_h+0x14>
|
419 | datain[i] = SPDR;
|
420 | 240: 3e b5 in r19, 0x2e ; 46
|
421 | 242: 31 93 st Z+, r19
|
422 | 244: f2 cf rjmp .-28 ; 0x22a <_Z17spi_transfer_syncPhS_h+0x4>
|
423 | }
|
424 | }
|
425 | 246: 08 95 ret
|
426 |
|
427 | 00000248 <_Z17spi_transmit_syncPhh>:
|
428 |
|
429 | void spi_transmit_sync (uint8_t * dataout, uint8_t len)
|
430 | // Shift full array to target device without receiving any byte
|
431 | {
|
432 | 248: 28 2f mov r18, r24
|
433 | uint8_t i;
|
434 | for (i = 0; i < len; i++) {
|
435 | 24a: fc 01 movw r30, r24
|
436 | 24c: 8e 2f mov r24, r30
|
437 | 24e: 82 1b sub r24, r18
|
438 | 250: 86 17 cp r24, r22
|
439 | 252: 30 f4 brcc .+12 ; 0x260 <_Z17spi_transmit_syncPhh+0x18>
|
440 | SPDR = dataout[i];
|
441 | 254: 81 91 ld r24, Z+
|
442 | 256: 8e bd out 0x2e, r24 ; 46
|
443 | while((SPSR & (1<<SPIF))==0);
|
444 | 258: 0d b4 in r0, 0x2d ; 45
|
445 | 25a: 07 fe sbrs r0, 7
|
446 | 25c: fd cf rjmp .-6 ; 0x258 <_Z17spi_transmit_syncPhh+0x10>
|
447 | 25e: f6 cf rjmp .-20 ; 0x24c <_Z17spi_transmit_syncPhh+0x4>
|
448 | }
|
449 | }
|
450 | 260: 08 95 ret
|
451 |
|
452 | 00000262 <_Z14spi_fast_shifth>:
|
453 |
|
454 | uint8_t spi_fast_shift (uint8_t data)
|
455 | // Clocks only one byte to target device and returns the received one
|
456 | {
|
457 | SPDR = data;
|
458 | 262: 8e bd out 0x2e, r24 ; 46
|
459 | while((SPSR & (1<<SPIF))==0);
|
460 | 264: 0d b4 in r0, 0x2d ; 45
|
461 | 266: 07 fe sbrs r0, 7
|
462 | 268: fd cf rjmp .-6 ; 0x264 <_Z14spi_fast_shifth+0x2>
|
463 | return SPDR;
|
464 | 26a: 8e b5 in r24, 0x2e ; 46
|
465 | 26c: 08 95 ret
|
466 |
|
467 | 0000026e <_ZN7Max74564initEv>:
|
468 |
|
469 | //-----------------------------------------------------------------------------
|
470 | // Implements Max7456::init
|
471 | //-----------------------------------------------------------------------------
|
472 | void Max7456::init( void )
|
473 | {
|
474 | 26e: ef 92 push r14
|
475 | 270: ff 92 push r15
|
476 | 272: 0f 93 push r16
|
477 | 274: 1f 93 push r17
|
478 | 276: cf 93 push r28
|
479 | 278: df 93 push r29
|
480 | 27a: ec 01 movw r28, r24
|
481 | _isActivatedOsd = false;
|
482 | 27c: 19 82 std Y+1, r1 ; 0x01
|
483 |
|
484 | _regVm1.whole = 0b01000111;
|
485 | 27e: 87 e4 ldi r24, 0x47 ; 71
|
486 | 280: 8b 83 std Y+3, r24 ; 0x03
|
487 | spi_init();
|
488 | 282: 0e 94 04 01 call 0x208 ; 0x208 <_Z8spi_initv>
|
489 | __builtin_avr_delay_cycles(__ticks_dc);
|
490 | 286: 8f e3 ldi r24, 0x3F ; 63
|
491 | 288: 9c e9 ldi r25, 0x9C ; 156
|
492 | 28a: 01 97 sbiw r24, 0x01 ; 1
|
493 | 28c: f1 f7 brne .-4 ; 0x28a <_ZN7Max74564initEv+0x1c>
|
494 | 28e: 00 c0 rjmp .+0 ; 0x290 <_ZN7Max74564initEv+0x22>
|
495 | 290: 00 00 nop
|
496 | _delay_ms(20);
|
497 |
|
498 | spi_selectSlave(true);
|
499 | 292: 81 e0 ldi r24, 0x01 ; 1
|
500 | 294: 0e 94 0d 01 call 0x21a ; 0x21a <_Z15spi_selectSlaveb>
|
501 | spi_fast_shift(VM0_ADDRESS_WRITE);
|
502 | 298: 80 e0 ldi r24, 0x00 ; 0
|
503 | 29a: 0e 94 31 01 call 0x262 ; 0x262 <_Z14spi_fast_shifth>
|
504 |
|
505 | _regVm0.whole = 0x00;
|
506 | _regVm0.bits.videoSelect=1; //PAL
|
507 | _regVm0.bits.softwareResetBit = 1;
|
508 | 29e: 82 e4 ldi r24, 0x42 ; 66
|
509 | 2a0: 8a 83 std Y+2, r24 ; 0x02
|
510 | spi_fast_shift(_regVm0.whole);
|
511 | 2a2: 0e 94 31 01 call 0x262 ; 0x262 <_Z14spi_fast_shifth>
|
512 | spi_selectSlave(false);
|
513 | 2a6: 80 e0 ldi r24, 0x00 ; 0
|
514 | 2a8: 0e 94 0d 01 call 0x21a ; 0x21a <_Z15spi_selectSlaveb>
|
515 | 2ac: ef e3 ldi r30, 0x3F ; 63
|
516 | 2ae: fc e9 ldi r31, 0x9C ; 156
|
517 | 2b0: 31 97 sbiw r30, 0x01 ; 1
|
518 | 2b2: f1 f7 brne .-4 ; 0x2b0 <_ZN7Max74564initEv+0x42>
|
519 | 2b4: 00 c0 rjmp .+0 ; 0x2b6 <_ZN7Max74564initEv+0x48>
|
520 | 2b6: 00 00 nop
|
521 | _delay_ms(20);
|
522 |
|
523 | spi_selectSlave(true);
|
524 | 2b8: 81 e0 ldi r24, 0x01 ; 1
|
525 | 2ba: 0e 94 0d 01 call 0x21a ; 0x21a <_Z15spi_selectSlaveb>
|
526 | for(int x = 0 ; x < 16 ; x++)
|
527 | 2be: 00 e0 ldi r16, 0x00 ; 0
|
528 | 2c0: 10 e0 ldi r17, 0x00 ; 0
|
529 | 2c2: 7e 01 movw r14, r28
|
530 | 2c4: e0 0e add r14, r16
|
531 | 2c6: f1 1e adc r15, r17
|
532 | {
|
533 | _regRb[x].whole = 0x00;
|
534 | _regRb[x].bits.characterWhiteLevel = 2;
|
535 | 2c8: 82 e0 ldi r24, 0x02 ; 2
|
536 | 2ca: f7 01 movw r30, r14
|
537 | 2cc: 87 87 std Z+15, r24 ; 0x0f
|
538 | spi_fast_shift(x+RB0_ADDRESS_WRITE);
|
539 | 2ce: 80 e1 ldi r24, 0x10 ; 16
|
540 | 2d0: 80 0f add r24, r16
|
541 | 2d2: 0e 94 31 01 call 0x262 ; 0x262 <_Z14spi_fast_shifth>
|
542 | spi_fast_shift(_regRb[x].whole);
|
543 | 2d6: f7 01 movw r30, r14
|
544 | 2d8: 87 85 ldd r24, Z+15 ; 0x0f
|
545 | 2da: 0e 94 31 01 call 0x262 ; 0x262 <_Z14spi_fast_shifth>
|
546 | for(int x = 0 ; x < 16 ; x++)
|
547 | 2de: 0f 5f subi r16, 0xFF ; 255
|
548 | 2e0: 1f 4f sbci r17, 0xFF ; 255
|
549 | 2e2: 00 31 cpi r16, 0x10 ; 16
|
550 | 2e4: 11 05 cpc r17, r1
|
551 | 2e6: 69 f7 brne .-38 ; 0x2c2 <_ZN7Max74564initEv+0x54>
|
552 | }
|
553 |
|
554 | _regVm0.whole = 0x00;
|
555 |
|
556 | _regVm0.bits.verticalSynch = 1;
|
557 | 2e8: 84 e0 ldi r24, 0x04 ; 4
|
558 | 2ea: 8a 83 std Y+2, r24 ; 0x02
|
559 |
|
560 | spi_fast_shift(VM0_ADDRESS_WRITE);
|
561 | 2ec: 80 e0 ldi r24, 0x00 ; 0
|
562 | 2ee: 0e 94 31 01 call 0x262 ; 0x262 <_Z14spi_fast_shifth>
|
563 |
|
564 | spi_fast_shift(_regVm0.whole);
|
565 | 2f2: 8a 81 ldd r24, Y+2 ; 0x02
|
566 | 2f4: 0e 94 31 01 call 0x262 ; 0x262 <_Z14spi_fast_shifth>
|
567 | //
|
568 | // digitalWrite(_pinCS,LOW);
|
569 | //SPI.transfer(VM1_ADDRESS_WRITE);
|
570 | //SPI.transfer(0x0C);
|
571 |
|
572 | spi_selectSlave(false);
|
573 | 2f8: 80 e0 ldi r24, 0x00 ; 0
|
574 | }
|
575 | 2fa: df 91 pop r29
|
576 | 2fc: cf 91 pop r28
|
577 | 2fe: 1f 91 pop r17
|
578 | 300: 0f 91 pop r16
|
579 | 302: ff 90 pop r15
|
580 | 304: ef 90 pop r14
|
581 | spi_selectSlave(false);
|
582 | 306: 0c 94 0d 01 jmp 0x21a ; 0x21a <_Z15spi_selectSlaveb>
|
583 |
|
584 | 0000030a <_ZN7Max745611activateOSDEb>:
|
585 | 30a: 0f 93 push r16
|
586 | 30c: 1f 93 push r17
|
587 | 30e: cf 93 push r28
|
588 | 310: df 93 push r29
|
589 | 312: 1f 92 push r1
|
590 | 314: cd b7 in r28, 0x3d ; 61
|
591 | 316: de b7 in r29, 0x3e ; 62
|
592 | 318: 8c 01 movw r16, r24
|
593 | 31a: fc 01 movw r30, r24
|
594 | 31c: 81 81 ldd r24, Z+1 ; 0x01
|
595 | 31e: 86 17 cp r24, r22
|
596 | 320: d9 f0 breq .+54 ; 0x358 <_ZN7Max745611activateOSDEb+0x4e>
|
597 | 322: 82 81 ldd r24, Z+2 ; 0x02
|
598 | 324: 80 64 ori r24, 0x40 ; 64
|
599 | 326: 82 83 std Z+2, r24 ; 0x02
|
600 | 328: 66 23 and r22, r22
|
601 | 32a: 11 f0 breq .+4 ; 0x330 <_ZN7Max745611activateOSDEb+0x26>
|
602 | 32c: 88 60 ori r24, 0x08 ; 8
|
603 | 32e: 02 c0 rjmp .+4 ; 0x334 <_ZN7Max745611activateOSDEb+0x2a>
|
604 | 330: 87 7f andi r24, 0xF7 ; 247
|
605 | 332: f8 01 movw r30, r16
|
606 | 334: 82 83 std Z+2, r24 ; 0x02
|
607 | 336: 81 e0 ldi r24, 0x01 ; 1
|
608 | 338: 69 83 std Y+1, r22 ; 0x01
|
609 | 33a: 0e 94 0d 01 call 0x21a ; 0x21a <_Z15spi_selectSlaveb>
|
610 | 33e: 80 e0 ldi r24, 0x00 ; 0
|
611 | 340: 0e 94 31 01 call 0x262 ; 0x262 <_Z14spi_fast_shifth>
|
612 | 344: f8 01 movw r30, r16
|
613 | 346: 82 81 ldd r24, Z+2 ; 0x02
|
614 | 348: 0e 94 31 01 call 0x262 ; 0x262 <_Z14spi_fast_shifth>
|
615 | 34c: 80 e0 ldi r24, 0x00 ; 0
|
616 | 34e: 0e 94 0d 01 call 0x21a ; 0x21a <_Z15spi_selectSlaveb>
|
617 | 352: 69 81 ldd r22, Y+1 ; 0x01
|
618 | 354: f8 01 movw r30, r16
|
619 | 356: 61 83 std Z+1, r22 ; 0x01
|
620 | 358: 0f 90 pop r0
|
621 | 35a: df 91 pop r29
|
622 | 35c: cf 91 pop r28
|
623 | 35e: 1f 91 pop r17
|
624 | 360: 0f 91 pop r16
|
625 | 362: 08 95 ret
|
626 |
|
627 | 00000364 <main>:
|
628 | #include "RX5808.h"
|
629 |
|
630 | // declar
|
631 |
|
632 |
|
633 | int main(void) {
|
634 | 364: cf 93 push r28
|
635 | 366: df 93 push r29
|
636 | 368: 1f 92 push r1
|
637 | 36a: cd b7 in r28, 0x3d ; 61
|
638 | 36c: de b7 in r29, 0x3e ; 62
|
639 | RX5808 rx;
|
640 | 36e: ce 01 movw r24, r28
|
641 | 370: 01 96 adiw r24, 0x01 ; 1
|
642 | 372: 0e 94 40 00 call 0x80 ; 0x80 <_ZN6RX5808C1Ev>
|
643 | rx.setFrequency(0);
|
644 | 376: 60 e0 ldi r22, 0x00 ; 0
|
645 | 378: 70 e0 ldi r23, 0x00 ; 0
|
646 | 37a: ce 01 movw r24, r28
|
647 | 37c: 01 96 adiw r24, 0x01 ; 1
|
648 | 37e: 0e 94 a4 00 call 0x148 ; 0x148 <_ZN6RX580812setFrequencyEj>
|
649 | 382: ff cf rjmp .-2 ; 0x382 <main+0x1e>
|
650 |
|
651 | 00000384 <_exit>:
|
652 | 384: f8 94 cli
|
653 |
|
654 | 00000386 <__stop_program>:
|
655 | 386: ff cf rjmp .-2 ; 0x386 <__stop_program>
|