1 | #include <avr/io.h>
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2 | #include <avr/interrupt.h>
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3 | #include <util/atomic.h>
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4 | #include <util/delay.h>
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5 |
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6 |
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7 | #define NOP __asm__ __volatile__ ("nop")
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8 |
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9 | #ifndef sbi
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10 | #define sbi(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit)) // setzt das angegebene Bit
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11 | #endif
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12 | #ifndef cbi
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13 | #define cbi(sfr, bit) (_SFR_BYTE(sfr) &= ~_BV(bit)) // löscht das angegebene Bit
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14 | #endif
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15 |
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16 | #define shift_Clock_OUT sbi (DDRB,1) // Pin 52, SHCP .. shift register input clock
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17 | #define shift_Latch_OUT sbi (DDRG,2) // Pin 39, STCP .. latch or storage register clock input
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18 | #define shift_MOSI_OUT sbi (DDRB,2) // Pin 51, DS .... data serial input
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19 | #define shift_Reset_OUT sbi (DDRG,0) // Pin 41, /MR ... master reset
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20 | #define shift_Slave_OUT sbi (DDRB,0) // Pin 53, muss Ausgang sein mit aktiven SPI
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21 | #define debugLED30_OUT sbi (DDRC,7) // Pin 30
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22 |
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23 | #define shift_Clock_ON sbi (PORTB,1) // PB1 einschalten
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24 | #define shift_Latch_ON sbi (PORTG,2) // PG2
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25 | #define shift_MOSI_ON sbi (PORTB,2) // PB2
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26 | #define shift_Reset_ON sbi (PORTG,0) // PG0
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27 | #define debugLED30_ON sbi (PORTC,7) //
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28 |
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29 | #define shift_Clock_OFF cbi (PORTB,1) // PB1 ausschalten
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30 | #define shift_Latch_OFF cbi (PORTG,2) // PG2
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31 | #define shift_MOSI_OFF cbi (PORTB,2) // PB2
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32 | #define shift_Reset_OFF cbi (PORTG,0) // PG0
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33 | #define debugLED30_OFF cbi (PORTC,7) //
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34 |
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35 | uint16_t value = 1;
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36 | uint8_t data;
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37 |
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38 |
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39 | int main()
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40 | {
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41 |
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42 | /* Init 74HC595 */
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43 | shift_Reset_ON;
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44 | shift_Reset_OUT;
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45 | shift_Latch_OUT;
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46 | shift_Reset_OFF; // delete shift register
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47 | shift_Reset_ON;
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48 | shift_Latch_ON; // take over storage register
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49 | shift_Latch_OFF;
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50 |
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51 | set_SPI_Master();
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52 |
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53 | SPDR = data; // zeigt Wirkung
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54 | //SPSR = (1 << SPIF); // ohne Wirkung
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55 | //value = SPSR; // ohne Wirkung
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56 | //value = (SPSR & (1 << SPIF)); // ohne Wirkung
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57 |
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58 | debugLED30_OUT;
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59 |
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60 | set_Timer1();
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61 |
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62 | while (1)
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63 | {
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64 | value = value << 1;
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65 | if (value >= 0x8000) value = 1; // höchstes Bit erreicht
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66 | _delay_ms(50);
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67 | }
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68 |
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69 | } // end main()
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70 |
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71 |
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72 | // ****** Funktionen ******* //
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73 |
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74 | ISR(TIMER1_COMPB_vect) //
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75 | {
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76 | const uint16_t tcount = 10000; // aller 5ms
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77 |
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78 | /* vom Schieberegister ins Ausgaberegister übernehmen */
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79 | shift_Latch_ON;
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80 | shift_Latch_OFF;
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81 |
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82 | uint8_t LSB = value & 0xFF;
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83 | uint8_t MSB = value >> 8;
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84 |
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85 | debugLED30_ON;
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86 | while (!(SPSR & (1 << SPIF))) // wait for transmission complete
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87 | ;
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88 | SPDR = LSB; // Start transmission
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89 | debugLED30_OFF;
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90 |
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91 | debugLED30_ON;
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92 | while (!(SPSR & (1 << SPIF))) // wait for transmission complete
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93 | ;
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94 | SPDR = MSB; // Start transmission
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95 | debugLED30_OFF;
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96 |
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97 | OCR1B += tcount;
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98 | }
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99 |
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100 |
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101 | void set_SPI_Master()
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102 | {
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103 | cli();
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104 | shift_Clock_OUT;
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105 | shift_Latch_OUT;
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106 | shift_MOSI_OUT;
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107 | shift_Reset_OUT;
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108 | shift_Slave_OUT;
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109 | // enable SPI, LSB first, Master, fck/4
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110 | SPCR = (1 << SPE) | (1 << DORD) | (1 << MSTR);
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111 | sei();
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112 | }
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113 |
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114 |
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115 | void set_Timer1 () // Normal Mode
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116 | {
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117 | cli();
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118 | TCCR1A = 0; // Reset
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119 | TCCR1B = 0; //
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120 | TIMSK1 = 0; //
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121 | TCNT1 = 0; //
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122 | OCR1B = 0; //
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123 | TIMSK1 = (1<<OCIE1B); // enable Compare Match B ISR
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124 | TCCR1B |= (1 << CS11); // Prescaler 8
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125 | sei();
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126 | }
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