1 | C:\Users\alex\esp\esp-idf>openocd -f interface/ftdi/c232hm.cfg -f board/esp-wroom-32.cfg
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2 | Open On-Chip Debugger v0.10.0-esp32-20191114 (2019-11-14-14:19)
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3 | Licensed under GNU GPL v2
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4 | For bug reports, read
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5 | http://openocd.org/doc/doxygen/bugs.html
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6 | WARNING: boards/esp-wroom-32.cfg is deprecated, and may be removed in a future release.
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7 | Info : Configured 2 cores
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8 | adapter speed: 1000 kHz
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9 | Info : Listening on port 6666 for tcl connections
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10 | Info : Listening on port 4444 for telnet connections
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11 | Error: type 'esp32' is missing virt2phys
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12 | Info : clock speed 1000 kHz
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13 | Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
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14 | Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
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15 | Info : esp32: Debug controller 0 was reset.
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16 | Info : esp32: Core 0 was reset.
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17 | Info : esp32: Debug controller 1 was reset.
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18 | Info : esp32: Core 1 was reset.
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19 | Info : Listening on port 3333 for gdb connections
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20 | Info : accepting 'gdb' connection on tcp/3333
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21 | Error: No symbols for FreeRTOS
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22 | Info : Target halted. CPU0: PC=0x40147B52 (active)
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23 | Info : Target halted. CPU1: PC=0x40147B52
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24 | Info : cpu0: Target halted, PC=0x400916EA, debug_reason=00000001
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25 | Info : Flash mapping 0: 0x10020 -> 0x3f400020, 100 KB
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26 | Info : Flash mapping 1: 0x30020 -> 0x400d0020, 486 KB
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27 | Info : cpu0: Target halted, PC=0x400916EA, debug_reason=00000001
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28 | Info : Auto-detected flash bank 'esp32.flash' size 4096 KB
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29 | Info : Using flash bank 'esp32.flash' size 4096 KB
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30 | Info : cpu0: Target halted, PC=0x400916EA, debug_reason=00000001
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31 | Info : Flash mapping 0: 0x10020 -> 0x3f400020, 100 KB
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32 | Info : Flash mapping 1: 0x30020 -> 0x400d0020, 486 KB
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33 | Info : Using flash bank 'esp32.irom' size 488 KB
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34 | Info : cpu0: Target halted, PC=0x400916EA, debug_reason=00000001
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35 | Info : Flash mapping 0: 0x10020 -> 0x3f400020, 100 KB
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36 | Info : Flash mapping 1: 0x30020 -> 0x400d0020, 486 KB
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37 | Info : Using flash bank 'esp32.drom' size 104 KB
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38 | Warn : negative reply, retrying
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39 | Warn : negative reply, retrying
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40 | esp32 arp_examine ['allow-defer']
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41 | esp32 arp_halt
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42 | esp32 arp_halt_gdb
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43 | esp32 arp_poll
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44 | esp32 arp_reset
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45 | esp32 arp_waitstate
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46 | esp32 esp32 flashbootstrap none|1.8|3.3|high|low
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47 | esp32 examine_deferred
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48 | esp32 flashbootstrap none|1.8|3.3|high|low
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49 | esp32 was_examined
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50 | ftdi_layout_init data direction
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51 | jtag arp_init-reset
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52 | jtag_reset trst_active srst_active
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53 | power_restore
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54 | program <filename> [address] [verify] [reset] [exit]
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55 | program_esp <filename> [address] [verify] [reset] [exit]
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56 | program_esp32 <filename> [address] [verify] [reset] [exit]
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57 | reset [run|halt|init]
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58 | reset_config [none|trst_only|srst_only|trst_and_srst]
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59 | [srst_pulls_trst|trst_pulls_srst|combined|separate]
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60 | [srst_gates_jtag|srst_nogate] [trst_push_pull|trst_open_drain]
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61 | [srst_push_pull|srst_open_drain]
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62 | [connect_deassert_srst|connect_assert_srst]
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63 | reset_nag ['enable'|'disable']
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64 | soft_reset_halt
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65 | srst_deasserted
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